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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id 33sm4458213wra.41.2019.09.17.07.07.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Sep 2019 07:07:35 -0700 (PDT) From: Jerome Brunet X-Google-Original-From: Jerome Brunet References: <1568700442-18540-1-git-send-email-qianggui.song@amlogic.com> <1568700442-18540-3-git-send-email-qianggui.song@amlogic.com> <1jef0f46fj.fsf@starbuckisacylon.baylibre.com> <73dc56bd-d6c5-1de7-e97e-91479a89a29e@amlogic.com> User-agent: mu4e 1.3.1; emacs 26.2 To: Qianggui Song Cc: Linus Walleij , linux-gpio@vger.kernel.org, Xingyu Chen , Jianxin Pan , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Carlo Caione , "Rob Herring" , Hanjie Lin , "Mark Rutland" , linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/3] pinctrl: meson-a1: add pinctrl driver for Meson A1 Soc In-reply-to: <73dc56bd-d6c5-1de7-e97e-91479a89a29e@amlogic.com> Date: Tue, 17 Sep 2019 16:07:34 +0200 Message-ID: <1j8sqn3tjt.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue 17 Sep 2019 at 13:51, Qianggui Song wrote: >>> diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c >>> index 8bba9d0..885b89d 100644 >>> --- a/drivers/pinctrl/meson/pinctrl-meson.c >>> +++ b/drivers/pinctrl/meson/pinctrl-meson.c >>> @@ -688,8 +688,12 @@ static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc, >>> >>> pc->reg_ds = meson_map_resource(pc, gpio_np, "ds"); >>> if (IS_ERR(pc->reg_ds)) { >>> - dev_dbg(pc->dev, "ds registers not found - skipping\n"); >>> - pc->reg_ds = NULL; >>> + if (pc->data->reg_layout == A1_LAYOUT) { >>> + pc->reg_ds = pc->reg_pullen; >> >> IMO, this kind of ID based init fixup is not going to scale and will >> lead to something difficult to maintain in the end. >> >> The way the different register sets interract with each other is already >> pretty complex to follow. >> >> You could rework this in 2 different ways: >> #1 - Have the generic function parse all the register sets and have all >> drivers provide a specific (as in gxbb, gxl, axg, etc ...) function to : >> - Verify the expected sets have been provided >> - Make assignement fixup as above if necessary >> >> #2 - Rework the driver to have only one single register region >> I think one of your colleague previously mentionned this was not >> possible. It is still unclear to me why ... >> > Appreciate your advice. I have an idea based on #1, how about providing > only two dt parse function, one is for chips before A1(the old one), > another is for A1 and later chips that share the same layout. Assign > these two functions to their own driver. That's roughly the same thing as your initial proposition with function pointer instead of IDs ... IMO, this would still be a quick fix to address your immediate topic instead of dealing with the driver as whole, which is my concern here. >>> + } else { >>> + dev_dbg(pc->dev, "ds registers not found - skipping\n"); >>> + pc->reg_ds = NULL; >>> + } >>> } >>> >>> return 0; >>> diff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h >>> index c696f32..3d0c58d 100644 >>> --- a/drivers/pinctrl/meson/pinctrl-meson.h >>> +++ b/drivers/pinctrl/meson/pinctrl-meson.h >>> @@ -80,6 +80,14 @@ enum meson_pinconf_drv { >>> }; >>> >>> /** >>> + * enum meson_reg_layout - identify two types of reg layout >>> + */ >>> +enum meson_reg_layout { >>> + LEGACY_LAYOUT, >>> + A1_LAYOUT, >>> +}; >>> + >>> +/** >>> * struct meson bank >>> * >>> * @name: bank name >>> @@ -114,6 +122,7 @@ struct meson_pinctrl_data { >>> unsigned int num_banks; >>> const struct pinmux_ops *pmx_ops; >>> void *pmx_data; >>> + unsigned int reg_layout; >>> }; >>> >>> struct meson_pinctrl { >> >> . >>