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AJvYcCUHbWNriBMWZwP92OrNrdft6NJgStx6fgChL8SDc6tBxHVZVbwrxTJQ+nRDMKLsl6Fq634BddwFVIp4pBc=@vger.kernel.org X-Gm-Message-State: AOJu0YyKoPe55YE0S90VYfeVwoLfAt2GmIdhvUhFUK4zxvQcM6gxn/4z ZrtOyI+gyNXH1j4iWnh6WSEXLbuCr2m0JWneDKtULyhRifm6HMqpBaat8bzXAN0= X-Google-Smtp-Source: AGHT+IEjc8x6P1fiXZXvuy0RRWf3NASza2rMgKQJv+Xo7tziKvwCXEKE7ppPcNk2dKWu+ZlA7d9gqg== X-Received: by 2002:adf:9bce:0:b0:374:c3e4:d6de with SMTP id ffacd0b85a97d-37eb47693ebmr1176601f8f.41.1729243259689; Fri, 18 Oct 2024 02:20:59 -0700 (PDT) Received: from localhost ([2a01:e0a:3c5:5fb1:6e2b:4562:2d66:575e]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0eccbasm1390562f8f.81.2024.10.18.02.20.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 02:20:59 -0700 (PDT) From: Jerome Brunet To: Xianwei Zhao Cc: Krzysztof Kozlowski , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Martin Blumenstingl , Bartosz Golaszewski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/3] dt-bindings: pinctrl: Add support for Amlogic A4 SoCs In-Reply-To: <4127b448-a914-4c69-b938-29512995326f@amlogic.com> (Xianwei Zhao's message of "Fri, 18 Oct 2024 17:01:09 +0800") References: <20241018-a4_pinctrl-v3-0-e76fd1cf01d7@amlogic.com> <20241018-a4_pinctrl-v3-1-e76fd1cf01d7@amlogic.com> <4a79f996-9d82-48b2-8a93-d7917413ed8c@kernel.org> <1jttd9rein.fsf@starbuckisacylon.baylibre.com> <4127b448-a914-4c69-b938-29512995326f@amlogic.com> Date: Fri, 18 Oct 2024 11:20:58 +0200 Message-ID: <1jmsj1rclh.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On Fri 18 Oct 2024 at 17:01, Xianwei Zhao wrote: > Hi Jerome, > Thanks for your reply. > > On 2024/10/18 16:39, Jerome Brunet wrote: >> [ EXTERNAL EMAIL ] >> On Fri 18 Oct 2024 at 10:28, Krzysztof Kozlowski wrote: >> >>> On 18/10/2024 10:10, Xianwei Zhao via B4 Relay wrote: >>>> From: Xianwei Zhao >>>> >>>> Add the new compatible name for Amlogic A4 pin controller, and add >>>> a new dt-binding header file which document the detail pin names. >> the change does not do what is described here. At least the description >> needs updating. >> > > Will do. > >> So if the pin definition is now in the driver, does it mean that pins have >> to be referenced in DT directly using the made up numbers that are >> created in pinctrl-amlogic-a4.c at the beginning of patch #2 ? >> > > Yes. > >> If that's case, it does not look very easy a read. >> > > It does happen. The pin definition does not fall under the category of > binding. > > https://lore.kernel.org/all/106f4321-59e8-49b9-bad3-eeb57627c921@amlogic.com/ So the expectation is that people will write something like: reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>; And others will go in the driver to see that is maps to GPIOX_10 ? the number being completly made up, with no link to anything HW/Datasheet whatsoever ? This is how things should be done now ? > >>>> >>>> Signed-off-by: Xianwei Zhao >>> >>> Acked-by: Krzysztof Kozlowski >>> >>> Best regards, >>> Krzysztof >> -- >> Jerome -- Jerome