From: Jerome Brunet <jbrunet@baylibre.com>
To: Changhuang Liang <changhuang.liang@starfivetech.com>,
Michael Turquette <mturquette@baylibre.com>,
Brian Masney <bmasney@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Stephen Boyd <sboyd@kernel.org>, Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>,
Kees Cook <kees@kernel.org>,
"Gustavo A . R . Silva" <gustavoars@kernel.org>,
Richard Cochran <richardcochran@gmail.com>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-hardening@vger.kernel.org"
<linux-hardening@vger.kernel.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
Hal Feng <hal.feng@starfivetech.com>
Subject: Re: [PATCH v4 03/22] clk: starfive: Rename file name "jh71x0" to "common"
Date: Wed, 30 Sep 2026 10:07:11 +0200 [thread overview]
Message-ID: <1jtsn72mds.fsf@starbuckisacylon.baylibre.com> (raw)
In-Reply-To: <ZQ4PR01MB12022FD5940DAA1AC1279B8FF28D2@ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn>
On lun. 28 sept. 2026 at 11:10, Changhuang Liang <changhuang.liang@starfivetech.com> wrote:
> Hi, Jerome
>
> Thanks for the review.
>
>> On dim. 20 sept. 2026 at 05:00, Changhuang Liang
>> <changhuang.liang@starfivetech.com> wrote:
>>
>> > From: Sia Jee Heng <jeeheng.sia@starfivetech.com>
>> >
>> > StarFive JHB100 shares a similar clock and reset design with JH7110.
>> > To facilitate the reuse of the file and its functionalities, files
>> > containing the "jh71x0" naming convention are renamed to use the
>> > "common" wording.
>>
>> Is this really necessary ? Rename are generally not recommended.
>> Do we really care if your new soc use something named after the older one ?
>>
>> You are naming it common now but how long is it going to stay "common" ?
>> If your next SoC does not use this anymore it won't be common for long ...
>>
>
> Okay, I will drop the current PATCH 1/2/3/4 and directly reuse the current JH71x0-related interfaces.
>
Please make sure your series applies on clk-next next time around.
This one failed to apply when it was sent.
>> >
>> > Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
>> > Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
>> > Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
>> > Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
>> > ---
>> > drivers/clk/starfive/Kconfig | 8
>> ++++----
>> > drivers/clk/starfive/Makefile | 2 +-
>> > .../{clk-starfive-jh71x0.c => clk-starfive-common.c} | 4 ++--
>> > .../{clk-starfive-jh71x0.h => clk-starfive-common.h} | 4 ++--
>> > drivers/clk/starfive/clk-starfive-jh7100-audio.c | 2 +-
>> > drivers/clk/starfive/clk-starfive-jh7100.c | 2 +-
>> > drivers/clk/starfive/clk-starfive-jh7110.h | 2 +-
>> > 7 files changed, 12 insertions(+), 12 deletions(-) rename
>> > drivers/clk/starfive/{clk-starfive-jh71x0.c => clk-starfive-common.c}
>> > (99%) rename drivers/clk/starfive/{clk-starfive-jh71x0.h =>
>> > clk-starfive-common.h} (98%)
>> >
>> > diff --git a/drivers/clk/starfive/Kconfig
>> > b/drivers/clk/starfive/Kconfig index bd29358ffeec..ff8eace36e64 100644
>> > --- a/drivers/clk/starfive/Kconfig
>> > +++ b/drivers/clk/starfive/Kconfig
>> > @@ -1,12 +1,12 @@
>> > # SPDX-License-Identifier: GPL-2.0
>> >
>> > -config CLK_STARFIVE_JH71X0
>> > +config CLK_STARFIVE_COMMON
>> > bool
>> >
>> > config CLK_STARFIVE_JH7100
>> > bool "StarFive JH7100 clock support"
>> > depends on ARCH_STARFIVE || COMPILE_TEST
>> > - select CLK_STARFIVE_JH71X0
>> > + select CLK_STARFIVE_COMMON
>> > default ARCH_STARFIVE
>> > help
>> > Say yes here to support the clock controller on the StarFive
>> > JH7100 @@ -15,7 +15,7 @@ config CLK_STARFIVE_JH7100 config
>> > CLK_STARFIVE_JH7100_AUDIO
>> > tristate "StarFive JH7100 audio clock support"
>> > depends on CLK_STARFIVE_JH7100
>> > - select CLK_STARFIVE_JH71X0
>> > + select CLK_STARFIVE_COMMON
>> > default m if ARCH_STARFIVE
>> > help
>> > Say Y or M here to support the audio clocks on the StarFive JH7100
>> > @@ -33,7 +33,7 @@ config CLK_STARFIVE_JH7110_SYS
>> > bool "StarFive JH7110 system clock support"
>> > depends on ARCH_STARFIVE || COMPILE_TEST
>> > select AUXILIARY_BUS
>> > - select CLK_STARFIVE_JH71X0
>> > + select CLK_STARFIVE_COMMON
>> > select RESET_STARFIVE_JH7110 if RESET_CONTROLLER
>> > select CLK_STARFIVE_JH7110_PLL
>> > default ARCH_STARFIVE
>> > diff --git a/drivers/clk/starfive/Makefile
>> > b/drivers/clk/starfive/Makefile index 199ac0f37a2f..012f7ee83f8e
>> > 100644
>> > --- a/drivers/clk/starfive/Makefile
>> > +++ b/drivers/clk/starfive/Makefile
>> > @@ -1,5 +1,5 @@
>> > # SPDX-License-Identifier: GPL-2.0
>> > -obj-$(CONFIG_CLK_STARFIVE_JH71X0) += clk-starfive-jh71x0.o
>> > +obj-$(CONFIG_CLK_STARFIVE_COMMON) += clk-starfive-common.o
>> >
>> > obj-$(CONFIG_CLK_STARFIVE_JH7100) += clk-starfive-jh7100.o
>> > obj-$(CONFIG_CLK_STARFIVE_JH7100_AUDIO) +=
>> clk-starfive-jh7100-audio.o
>> > diff --git a/drivers/clk/starfive/clk-starfive-jh71x0.c
>> > b/drivers/clk/starfive/clk-starfive-common.c
>> > similarity index 99%
>> > rename from drivers/clk/starfive/clk-starfive-jh71x0.c
>> > rename to drivers/clk/starfive/clk-starfive-common.c
>> > index 80e9157347eb..4aecb65e9fd7 100644
>> > --- a/drivers/clk/starfive/clk-starfive-jh71x0.c
>> > +++ b/drivers/clk/starfive/clk-starfive-common.c
>> > @@ -1,6 +1,6 @@
>> > // SPDX-License-Identifier: GPL-2.0
>> > /*
>> > - * StarFive JH71X0 Clock Generator Driver
>> > + * StarFive Clock Generator Driver
>> > *
>> > * Copyright (C) 2021-2022 Emil Renner Berthing <kernel@esmil.dk>
>> > */
>> > @@ -10,7 +10,7 @@
>> > #include <linux/device.h>
>> > #include <linux/io.h>
>> >
>> > -#include "clk-starfive-jh71x0.h"
>> > +#include "clk-starfive-common.h"
>> >
>> > static struct jh71x0_clk *jh71x0_clk_from(struct clk_hw *hw) { diff
>> > --git a/drivers/clk/starfive/clk-starfive-jh71x0.h
>> > b/drivers/clk/starfive/clk-starfive-common.h
>> > similarity index 98%
>> > rename from drivers/clk/starfive/clk-starfive-jh71x0.h
>> > rename to drivers/clk/starfive/clk-starfive-common.h
>> > index 9d5dec1d5cd1..f634c62c196a 100644
>> > --- a/drivers/clk/starfive/clk-starfive-jh71x0.h
>> > +++ b/drivers/clk/starfive/clk-starfive-common.h
>> > @@ -1,6 +1,6 @@
>> > /* SPDX-License-Identifier: GPL-2.0 */ -#ifndef
>> > __CLK_STARFIVE_JH71X0_H -#define __CLK_STARFIVE_JH71X0_H
>> > +#ifndef __CLK_STARFIVE_COMMON_H
>> > +#define __CLK_STARFIVE_COMMON_H
>> >
>> > #include <linux/bits.h>
>> > #include <linux/clk-provider.h>
>> > diff --git a/drivers/clk/starfive/clk-starfive-jh7100-audio.c
>> > b/drivers/clk/starfive/clk-starfive-jh7100-audio.c
>> > index de1cf717e391..0e363b971e9d 100644
>> > --- a/drivers/clk/starfive/clk-starfive-jh7100-audio.c
>> > +++ b/drivers/clk/starfive/clk-starfive-jh7100-audio.c
>> > @@ -14,7 +14,7 @@
>> >
>> > #include <dt-bindings/clock/starfive-jh7100-audio.h>
>> >
>> > -#include "clk-starfive-jh71x0.h"
>> > +#include "clk-starfive-common.h"
>> >
>> > /* external clocks */
>> > #define JH7100_AUDCLK_AUDIO_SRC (JH7100_AUDCLK_END
>> + 0)
>> > diff --git a/drivers/clk/starfive/clk-starfive-jh7100.c
>> > b/drivers/clk/starfive/clk-starfive-jh7100.c
>> > index 761e46ed0ffd..ca81ccb5af94 100644
>> > --- a/drivers/clk/starfive/clk-starfive-jh7100.c
>> > +++ b/drivers/clk/starfive/clk-starfive-jh7100.c
>> > @@ -14,7 +14,7 @@
>> >
>> > #include <dt-bindings/clock/starfive-jh7100.h>
>> >
>> > -#include "clk-starfive-jh71x0.h"
>> > +#include "clk-starfive-common.h"
>> >
>> > /* external clocks */
>> > #define JH7100_CLK_OSC_SYS (JH7100_CLK_END + 0)
>> > diff --git a/drivers/clk/starfive/clk-starfive-jh7110.h
>> > b/drivers/clk/starfive/clk-starfive-jh7110.h
>> > index 0659adae4d76..6b1bdf860f00 100644
>> > --- a/drivers/clk/starfive/clk-starfive-jh7110.h
>> > +++ b/drivers/clk/starfive/clk-starfive-jh7110.h
>> > @@ -2,7 +2,7 @@
>> > #ifndef __CLK_STARFIVE_JH7110_H
>> > #define __CLK_STARFIVE_JH7110_H
>> >
>> > -#include "clk-starfive-jh71x0.h"
>> > +#include "clk-starfive-common.h"
>> >
>> > /* top clocks of ISP/VOUT domain from JH7110 SYSCRG */ struct
>> > jh7110_top_sysclk {
>> > --
>> > 2.25.1
>> >
>> >
>> > _______________________________________________
>> > linux-riscv mailing list
>> > linux-riscv@lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
>> --
>
> Best Regards
> Changhuang
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
--
Jerome
next prev parent reply other threads:[~2026-09-30 8:07 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-20 12:00 [PATCH v4 00/22] Add basic clocks and resets for JHB100 SoC Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 01/22] reset: starfive: Rename file name "jh71x0" to "common" Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 02/22] reset: starfive: Convert the word "jh71x0" to "starfive" Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 03/22] clk: starfive: Rename file name "jh71x0" to "common" Changhuang Liang
2026-09-25 15:26 ` Jerome Brunet
2026-09-28 11:10 ` Changhuang Liang
2026-09-30 8:07 ` Jerome Brunet [this message]
2026-09-30 8:27 ` Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 04/22] clk: starfive: Convert the word "jh71x0" to "starfive" Changhuang Liang
2026-09-25 15:28 ` Jerome Brunet
2026-09-20 12:00 ` [PATCH v4 05/22] dt-bindings: clock: Add StarFive JHB100 System-0 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 06/22] clk: starfive: Add JHB100 System-0 clock generator driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 07/22] dt-bindings: clock: Add StarFive JHB100 System-1 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 08/22] clk: starfive: Add JHB100 System-1 clock generator driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 09/22] dt-bindings: clock: Add StarFive JHB100 System-2 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 10/22] clk: starfive: Add JHB100 System-2 clock generator driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 11/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-0 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 12/22] clk: starfive: Introduce idiv ops for inverted divider clocks Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 13/22] clk: starfive: Expand the storage of clock parent index Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 14/22] clk: starfive: Add StarFive JHB100 Peripheral-0 clock driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 15/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-1 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 16/22] clk: starfive: Add StarFive JHB100 Peripheral-1 clock driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 17/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-2 clock and reset generator Changhuang Liang
2026-09-27 17:40 ` Krzysztof Kozlowski
2026-09-20 12:00 ` [PATCH v4 18/22] clk: starfive: Add StarFive JHB100 Peripheral-2 clock driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 19/22] dt-bindings: clock: Add StarFive JHB100 Peripheral-3 clock and reset generator Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 20/22] clk: starfive: Add StarFive JHB100 Peripheral-3 clock driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 21/22] reset: starfive: Add StarFive JHB100 reset driver Changhuang Liang
2026-09-20 12:00 ` [PATCH v4 22/22] riscv: dts: starfive: jhb100: Add clocks and resets nodes Changhuang Liang
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