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Date: Thu, 28 Jun 2001 10:04:33 +0900 (JST)
Message-Id: <200106280104.f5S14XA05644@mule.m17n.org>
From: NIIBE Yutaka <gniibe@m17n.org>
To: "David S. Miller" <davem@redhat.com>
Cc: "Stephen C. Tweedie" <sct@redhat.com>,
        Marcelo Tosatti <marcelo@conectiva.com.br>,
        lkml <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] swapin flush cache bug
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David S. Miller wrote:
 > The I/O completion must flush the cache, not the VM subsystem.
 > 
 > You must implement cache flushing at the DMA tranfer end point
 > to fix the problem you are describing.

Thanks a lot.  I understand now.  

Aha, that's the reason why we have __flush_dcache_range() in ide_insw
for Sparc64 implementation, isn't it?  I'll follow it for SuperH.

I'll close the entry for MM bugzilla, it's not MM bug.
--