Re: [PATCH] PCI updates - prefetchable memory regions

[Ivan Kokshaysky <ink@jurassic.park.msu.ru>]

On Thu, Dec 20, 2001 at 01:36:19PM +0000, Russell King wrote:
> Could you explain this a bit better.  The reason we need to split the
> prefetchable regions from the non-prefetchable regions is that most
> bridges can only cope with one region which is prefetchable.

No. Most host-to-pci bridges actually have only non-prefetchable memory
region. That is, they don't generate Memory Read Line or Memory Read
Multiple transactions at all.
For pci-to-pci bridges, prefetchable region is optional (as well as I/O),
but most (if not all) bridges have it.
If we place memory-like resource behind the pci-pci bridge in the
prefetchable region, the bridge can convert Memory Read command from
its primary bus to Read Line/Multiply on the secondary bus, improving
performance thus.

> Also, some machines have a limited (sometimes fixed address and size)
> region that can only be used for prefetchable memory.  How do you cater
> for this?

Just fine, if your root_bus->resource[2] is not NULL and initialized
properly. If it's too small to hold all prefetchable resources,
the rest will be allocated in the non-prefetch memory region.

Ivan.