Sender: ak@suse.de
To: Dave Jones <davej@redhat.com>
Cc: pavel@ucw.cz, linux-kernel@vger.kernel.org,
	paul.devriendt@amd.com
Subject: Re: Cpufreq for opteron
References: <20030822135946.GA2194@elf.ucw.cz.suse.lists.linux.kernel>
	<20030822144340.GE3111@redhat.com.suse.lists.linux.kernel>
From: Andi Kleen <ak@suse.de>
Date: 22 Aug 2003 17:59:19 +0200
In-Reply-To: <20030822144340.GE3111@redhat.com.suse.lists.linux.kernel>
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Dave Jones <davej@redhat.com> writes:

> This is likely to be lots of 'fun'. The multiple stage state machine
> that the opteron powernow uses could be preempted at any stage.
> Might not be that big a deal for UP (except for any timing specific
> routines, that need explicit disable/enable around them). But for SMP,
> where you could wind up on a different CPU when you return to kernel
> space, 'bad shit' will happen. Good luck!

You just have to set the scheduler affinity mask of the current process
to a single CPU while executing this - or run it in a workqueue
which is already bound.

But it doesn't matter right now because the driver doesn't support SMP.

>  > +static int onbattery = 1;	/* Set if running on battery, reset otherwise. */
>  > +			   /* Of no relevance unless batterypstates <     */
>  > +			   /* numpstates, as defined in the PSB/PST.      */
> 
> Where is this set ? My guess is you're going to need ACPI hooks
> to do this, in which case it shouldn't be static.

See the comment. For the current code/machines it does not make any difference.

It may be for future chips, but that will need an updated driver anyways.

>  > +	/* WARNING - the cpufreq calls end up doing nothing in a SMP kernel.       */
>  > +	/* This code will not work too well in such a kernel. This module protects */
>  > +	/* itself from being compiled ifdef CONFIG_SMP.                            */
> 
> Again, why ? Have you actually tried this ?
> If you have any ideas whats wrong here, we'd like to get this fixed up.

SMP cpufreq will need a lot more work.

Also current Opterons don't support advanced power saving in SMP systems
(neither does Intel btw)

-Andi