From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S265213AbUBAFK2 (ORCPT ); Sun, 1 Feb 2004 00:10:28 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S265215AbUBAFK2 (ORCPT ); Sun, 1 Feb 2004 00:10:28 -0500 Received: from parcelfarce.linux.theplanet.co.uk ([195.92.249.252]:15782 "EHLO www.linux.org.uk") by vger.kernel.org with ESMTP id S265213AbUBAFKX (ORCPT ); Sun, 1 Feb 2004 00:10:23 -0500 Date: Sun, 1 Feb 2004 05:10:21 +0000 From: Matthew Wilcox To: "Eric W. Biederman" Cc: Matthew Wilcox , Linus Torvalds , "Durairaj, Sundarapandian" , Kernel Mailing List , linux-pci@atrey.karlin.mff.cuni.cz, Alan Cox , Greg KH , Andi Kleen , Andrew Morton , mj@ucw.cz, "Kondratiev, Vladimir" , "Seshadri, Harinarayanan" , "Nakajima, Jun" Subject: Re: [patch] PCI Express Enhanced Config Patch - 2.6.0-test11 Message-ID: <20040201051021.GO18725@parcelfarce.linux.theplanet.co.uk> References: <6B09584CC3D2124DB45C3B592414FA830112C34F@bgsmsx402.gar.corp.intel.com> <20040129150925.GC18725@parcelfarce.linux.theplanet.co.uk> <20040129155911.GD18725@parcelfarce.linux.theplanet.co.uk> <20040129164230.GE18725@parcelfarce.linux.theplanet.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.1i Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jan 31, 2004 at 02:57:29PM -0700, Eric W. Biederman wrote: > Is it really safe to treat the base address as a u32? I know > if I was doing the BIOS and that address was tied to a 32bit BAR I > would be extremely tempted to put those 256M of address space above > 4G. Putting something like that below 4G leads to 1/2 Gig of memory > missing. This is actually a Linux limitation -- we're pretty bad at dealing with 64-bit BARs on 32-bit architectures. There's two interfaces to get at it -- ioremap() and set_fixmap(). Both of these interfaces take an unsigned long to describe a physical address. > Point being I don't think it is safe to assume the BIOS always puts > the extended PCI configuration space below 4G. MCFG isn't described in any released version of the ACPI spec, so I don't know whether it's even possible for it to be a 64-bit address. There's a reserved field that might be used for the upper 32 bits. -- "Next the statesmen will invent cheap lies, putting the blame upon the nation that is attacked, and every man will be glad of those conscience-soothing falsities, and will diligently study them, and refuse to examine any refutations of them; and thus he will by and by convince himself that the war is just, and will thank God for the better sleep he enjoys after this process of grotesque self-deception." -- Mark Twain