From: Andrew Morton <akpm@osdl.org>
To: Andi Kleen <ak@suse.de>
Cc: mikpe@csd.uu.se, ak@suse.de, linux-kernel@vger.kernel.org
Subject: Re: [BUG] 2.6.6-rc2-bk5 mm/slab.c change broke x86-64 SMP
Date: Fri, 30 Apr 2004 19:01:02 -0700 [thread overview]
Message-ID: <20040430190102.2994000e.akpm@osdl.org> (raw)
In-Reply-To: <20040501014807.GC14663@wotan.suse.de>
Andi Kleen <ak@suse.de> wrote:
>
> > Does this fix?
> >
> > diff -puN include/asm-x86_64/processor.h~a include/asm-x86_64/processor.h
> > --- 25/include/asm-x86_64/processor.h~a Fri Apr 30 11:24:58 2004
> > +++ 25-akpm/include/asm-x86_64/processor.h Fri Apr 30 11:25:28 2004
> > @@ -20,6 +20,8 @@
> > #include <asm/mmsegment.h>
> > #include <linux/personality.h>
> >
> > +#define ARCH_MIN_TASKALIGN L1_CACHE_BYTES
>
> 16 should be enough actually. The problem is the FXSAVE instruction that
> is used to switch the FPU state, and that only requires 16 byte alignment.
>
yup. I sent Linus the patch which changes the default from 0 to
L1_CACHE_SIZE in kernel/fork.c. x86_64 can override that by setting
ARCH_MIN_TASKALIGN to 16 in asm/processor.h
next prev parent reply other threads:[~2004-05-01 2:01 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2004-04-30 16:11 Mikael Pettersson
2004-04-30 18:21 ` Jonathan Corbet
2004-04-30 18:27 ` Andrew Morton
2004-04-30 19:29 ` Jonathan Corbet
2004-04-30 20:31 ` Andrew Morton
2004-04-30 19:33 ` R. J. Wysocki
2004-04-30 20:24 ` Andrew Morton
2004-05-01 1:48 ` Andi Kleen
2004-05-01 2:01 ` Andrew Morton [this message]
2004-05-01 2:02 ` Andi Kleen
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