From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S261212AbVFHNcg (ORCPT ); Wed, 8 Jun 2005 09:32:36 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S261213AbVFHNcg (ORCPT ); Wed, 8 Jun 2005 09:32:36 -0400 Received: from cantor.suse.de ([195.135.220.2]:63181 "EHLO mx1.suse.de") by vger.kernel.org with ESMTP id S261212AbVFHNc1 (ORCPT ); Wed, 8 Jun 2005 09:32:27 -0400 Date: Wed, 8 Jun 2005 15:32:26 +0200 From: Andi Kleen To: Grant Grundler Cc: Greg KH , Jeff Garzik , "David S. Miller" , tom.l.nguyen@intel.com, roland@topspin.com, linux-pci@atrey.karlin.mff.cuni.cz, linux-kernel@vger.kernel.org, ak@suse.de Subject: Re: [RFC PATCH] PCI: remove access to pci_[enable|disable]_msi() for drivers - take 2 Message-ID: <20050608133226.GR23831@wotan.suse.de> References: <20050607002045.GA12849@suse.de> <20050607202129.GB18039@kroah.com> <20050608050212.GD21060@colo.lackof.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20050608050212.GD21060@colo.lackof.org> Sender: linux-kernel-owner@vger.kernel.org X-Mailing-List: linux-kernel@vger.kernel.org > I also see one minor weakness in the assumption that CPU Vectors > are global. Both IA64/PARISC can support per-CPU Vector tables. x86-64 will eventually too, I definitely plan for it at some point. We need it for very big machines where 255 interrupt vectors are not enough. And as you say with MSI-X it becomes even more important. -Andi