On Tue, Jul 05, 2005 at 03:19:40PM +0100, David Vrabel wrote:
> The 8250 serial driver detects the Exar XR16L2551 as a 16550A.  The
> XR16L2551 has an EFR register and sleep capabilities (UART_CAP_FIFO |
> UART_CAP_EFR | UART_CAP_SLEEP).  However, broken_efr() thinks it's a
> buggy Exar ST16C255x.

Grumble!

> Any suggestion on how to differentiate between the two parts?  Exar have
> made the ST16C255x with the same registers as the XR16L255x...

If they're 100% identical in terms of the registers, then it's probably
impossible to differentiate between the two.

> Perhaps it's okay for the ST16C255x to be detected as something with
> UART_CAP_EFR | UART_CAP_SLEEP even if it doesn't work? i.e., by removing
> broken_efr().

I don't know - maybe Alex Williamson can try your patch out.

> Also, the initial IER test was failing (after a soft reboot) with the
> XR16L2551 part since the sleep mode bit was set but was read-only.  It
> seems sensible to make this test only look at the lower 4 bits.

... or maybe this can be used to test for the buggy version.

> Index: linux-2.6-working/drivers/serial/8250.c
> ===================================================================
> --- linux-2.6-working.orig/drivers/serial/8250.c	2005-07-04 13:43:13.000000000 +0100
> +++ linux-2.6-working/drivers/serial/8250.c	2005-07-05 15:08:05.000000000 +0100
> @@ -249,6 +249,14 @@
>  		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
>  		.flags		= UART_CAP_FIFO | UART_CAP_UUE,
>  	},
> +	[PORT_XR16550] = {
> +		.name		= "XR16550",
> +		.fifo_size	= 16,
> +		.tx_loadsz	= 16,
> +		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
> +				  UART_FCR_T_TRIG_00,

The docs I've just pulled of Exar's site imply that the XR16L2551
doesn't have a transmit trigger threshold, so UART_FCR_T_TRIG_00
shouldn't be specified here.  Also, is there a reason for restricting
the RX trigger level to 4 instead of 8 bytes?

-- 
Russell King
 Linux kernel    2.6 ARM Linux   - http://www.arm.linux.org.uk/
 maintainer of:  2.6 Serial core