From: Andi Kleen <ak@suse.de>
To: Tejun Heo <htejun@gmail.com>
Cc: lkml <linux-kernel@vger.kernel.org>, discuss@x86-64.org
Subject: Re: Question regarding x86_64 __PHYSICAL_MASK_SHIFT
Date: Tue, 4 Oct 2005 21:01:44 +0200 [thread overview]
Message-ID: <200510042101.44946.ak@suse.de> (raw)
In-Reply-To: <20051004185230.GA8431@htj.dyndns.org>
On Tuesday 04 October 2005 20:52, Tejun Heo wrote:
> Hello, Andi.
>
> On Tue, Oct 04, 2005 at 07:24:56PM +0200, Andi Kleen wrote:
> > You're right - PHYSICAL_MASK shouldn't be applied to PFNs, only to full
> > addresses. Fixed with appended patch.
> >
> > The 46bits limit is because half of the 48bit virtual space
> > is used for user space and the other 47 bit half is divided into
> > direct mapping and other mappings (ioremap, vmalloc etc.). All
> > physical memory has to fit into the direct mapping, so you
> > end with a 46 bit limit.
>
> __PHYSICAL_MASK is only used to mask out non-pfn bits from page table
> entries. I don't really see how it's related to virtual space
> construction.
Any other bits are not needed and should be pte_bad()ed.
Ok there could be IO mappings beyond 46bits in theory, but I will worry about
these when they happen. For now it's better to error out to easier detect
memory corruptions in page tables (some x86-64 CPUs tend to machine
check when presented with unmapped physical addresses, which
is nasty to track down)
>
> > See also Documentation/x86-64/mm.txt
>
> Thanks. :-)
>
> I think PHYSICAL_PAGE_MASK and PTE_FILE_MAX_BITS should also be
> updated. How about the following patch? Compile & boot tested.
No, I think the existing code with my patch is fine.
-Andi
next prev parent reply other threads:[~2005-10-04 19:01 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-10-04 11:59 Tejun Heo
2005-10-04 12:02 ` Tejun Heo
2005-10-04 17:24 ` Andi Kleen
2005-10-04 18:52 ` Tejun Heo
2005-10-04 19:01 ` Andi Kleen [this message]
2005-10-04 19:19 ` Tejun Heo
2005-10-04 19:27 ` Andi Kleen
2005-10-05 4:01 ` Tejun Heo
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