From: Lukas Hejtmanek <xhejtman@mail.muni.cz>
To: "Antonino A. Daplas" <adaplas@gmail.com>
Cc: Adrian Bunk <bunk@stusta.de>, linux-kernel@vger.kernel.org
Subject: Re: intelfb
Date: Tue, 10 Jan 2006 10:01:51 +0100 [thread overview]
Message-ID: <20060110090151.GH12559@mail.muni.cz> (raw)
In-Reply-To: <43C3759A.4030106@gmail.com>
On Tue, Jan 10, 2006 at 04:51:38PM +0800, Antonino A. Daplas wrote:
> > calculate pixel mod clock is wrong for this chip. And also I have an idea how to
> > setup a graphic mode on local LCD (laptops).
> >
>
> Can you post your hack to this list?
Well, for LVDS (internal LCD) I found, that PLL pixel clock is fixed accross any
resloution. This means that black magick used for PLL clock is not needed,
driver just need to read initial value of PLL registers and keep it (for
suspend/resume). It works to set resolution 640x480 using BIOS and then to
correct Pipes and Display planes to any resolution you want (usualy the
resolution of LCD). I guess that resolution 640x480 can be programmed directly
without BIOS (but I need to check it).
Another discover is that 0x61204 & ~1 allows LVDS register to be changed (and
also it disables LVDS output (DPMS D3 on LVDS). 0x61204 | 1 enables it back.
--
Lukáš Hejtmánek
next prev parent reply other threads:[~2006-01-10 9:01 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-01-08 23:48 intelfb Lukas Hejtmanek
2006-01-08 23:57 ` intelfb Adrian Bunk
2006-01-09 0:22 ` intelfb Antonino A. Daplas
2006-01-09 0:29 ` intelfb Adrian Bunk
2006-01-09 0:35 ` intelfb Antonino A. Daplas
2006-01-09 10:18 ` intelfb Lukas Hejtmanek
2006-01-10 1:29 ` intelfb Antonino A. Daplas
2006-01-10 8:35 ` intelfb Lukas Hejtmanek
2006-01-10 8:51 ` intelfb Antonino A. Daplas
2006-01-10 9:01 ` Lukas Hejtmanek [this message]
2006-01-08 23:58 ` intelfb Dave Airlie
2006-01-24 16:37 intelfb Knut Petersen
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