Re: [ambx1@neo.rr.com: Re: pci_restore_state]

[linas@austin.ibm.com (Linas Vepstas)]

On Fri, Jun 09, 2006 at 08:55:57PM +1000, Paul Mackerras wrote:
> Any comments on Adam's patch, particularly as it relates to EEH?  Do
> we use dev->saved_config_space to restore the device after an EEH
> reset?

Thanks, I was out sick.

On PowerPC, we don't use this struct; we save to a private area 
hanging off the device nocde. The goal for PCI error recovery was to 
save PCI state as it was shortly after boot, before the device driver
has mucked with it. That way, when the device driver starts up, 
it finds the state to be more-or-less the same as it would be on 
discovery after a cold boot.

> Any comments on this patch as an alternative solution?
> 
> http://marc.theaimsgroup.com/?l=linux-kernel&m=114949711413176&w=2

One question/remark. The patch says:

+	command = conf->command & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
+				    PCI_COMMAND_MASTER);
+
+	pci_write_config_word(dev, PCI_COMMAND, command);
+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, conf->cacheline_size);
+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, conf->latency_timer);
+	pci_write_config_byte(dev, PCI_INTERRUPT_PIN, conf->interrupt_pin);
+	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, conf->interrupt_line);
+
+	pci_restore_bars(dev);
 
-	for (i = 0; i < 16; i++)
-		pci_write_config_dword(dev,i * 4, dev->saved_config_space[i]);
 	pci_restore_msi_state(dev);
 	pci_restore_msix_state(dev);


First thing it does is disable bus mastering (which is probably good, 
you don't want the device going wild doing dma's till you're ready).
However, at some point, bus mastering needs to be re-enabled; does
some other power management code do this? Is the device driver 
supposed to notice something is amiss after a PM resume, and supposed
to set these?

--linas