From: Adrian Bunk <bunk@stusta.de>
To: linux-kernel@vger.kernel.org
Cc: Ingo Molnar <mingo@elte.hu>
Subject: [2.6 patch] cleanup arch/i386/kernel/smpboot.c:smp_tune_scheduling()
Date: Tue, 28 Nov 2006 02:28:39 +0100 [thread overview]
Message-ID: <20061128012839.GU15364@stusta.de> (raw)
This patch contains the following cleanups:
- remove the write-only local variable "bandwidth"
- don't set "max_cache_size" in the (cachesize < 0) case:
that's already handled in kernel/sched.c:measure_migration_cost()
Signed-off-by: Adrian Bunk <bunk@stusta.de>
---
arch/i386/kernel/smpboot.c | 29 +++++------------------------
1 file changed, 5 insertions(+), 24 deletions(-)
--- linux-2.6.19-rc6-mm1/arch/i386/kernel/smpboot.c.old 2006-11-27 23:36:48.000000000 +0100
+++ linux-2.6.19-rc6-mm1/arch/i386/kernel/smpboot.c 2006-11-27 23:48:16.000000000 +0100
@@ -1127,34 +1127,15 @@
}
#endif
-static void smp_tune_scheduling (void)
+static void smp_tune_scheduling(void)
{
unsigned long cachesize; /* kB */
- unsigned long bandwidth = 350; /* MB/s */
- /*
- * Rough estimation for SMP scheduling, this is the number of
- * cycles it takes for a fully memory-limited process to flush
- * the SMP-local cache.
- *
- * (For a P5 this pretty much means we will choose another idle
- * CPU almost always at wakeup time (this is due to the small
- * L1 cache), on PIIs it's around 50-100 usecs, depending on
- * the cache size)
- */
- if (!cpu_khz) {
- /*
- * this basically disables processor-affinity
- * scheduling on SMP without a TSC.
- */
- return;
- } else {
+ if (cpu_khz) {
cachesize = boot_cpu_data.x86_cache_size;
- if (cachesize == -1) {
- cachesize = 16; /* Pentiums, 2x8kB cache */
- bandwidth = 100;
- }
- max_cache_size = cachesize * 1024;
+
+ if (cachesize > 0)
+ max_cache_size = cachesize * 1024;
}
}
next reply other threads:[~2006-11-28 1:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-28 1:28 Adrian Bunk [this message]
2006-11-28 7:03 ` Ingo Molnar
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