From: Andi Kleen <ak@suse.de>
To: juergen@kreuzholzen.de, patches@x86-64.org, linux-kernel@vger.kernel.org
Subject: [PATCH] [9/11] x86: Replace NSC/Cyrix specific chipset access macros by inlined functions.
Date: Fri, 20 Jul 2007 17:32:53 +0200 (CEST) [thread overview]
Message-ID: <20070720153253.D17F214E7B@wotan.suse.de> (raw)
In-Reply-To: <20070720532.949522000@suse.de>
From: Juergen Beisert <juergen@kreuzholzen.de>
With the macros a line like this fails (and does nothing):
setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
With inlined functions this line will work as expected.
Note about a side effect: Seems on Geode GX1 based systems the
"suspend on halt power saving feature" was never enabled due to this
wrong macro expansion. With inlined functions it will be enabled, but
this will stop the TSC when the CPU runs into a HLT instruction.
Kernel output something like this:
Clocksource tsc unstable (delta = -472746897 ns)
This is the 3rd version of this patch.
- Adding missed arch/i386/kernel/cpu/mtrr/state.c
Thanks to Andres Salomon
- Adding some big fat comments into the new header file
Suggested by Andi Kleen
AK: fixed x86-64 compilation
Signed-off-by: Juergen Beisert <juergen@kreuzholzen.de>
Signed-off-by: Andi Kleen <ak@suse.de>
---
arch/i386/kernel/cpu/cpufreq/gx-suspmod.c | 2 +-
arch/i386/kernel/cpu/cyrix.c | 2 +-
arch/i386/kernel/cpu/mtrr/cyrix.c | 1 +
arch/i386/kernel/cpu/mtrr/state.c | 1 +
include/asm-i386/processor-cyrix.h | 30 ++++++++++++++++++++++++++++++
include/asm-i386/processor.h | 11 -----------
include/asm-x86_64/processor.h | 11 -----------
7 files changed, 34 insertions(+), 24 deletions(-)
Index: linux/include/asm-i386/processor.h
===================================================================
--- linux.orig/include/asm-i386/processor.h
+++ linux/include/asm-i386/processor.h
@@ -168,17 +168,6 @@ static inline void clear_in_cr4 (unsigne
write_cr4(cr4);
}
-/*
- * NSC/Cyrix CPU indexed register access macros
- */
-
-#define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
-
-#define setCx86(reg, data) do { \
- outb((reg), 0x22); \
- outb((data), 0x23); \
-} while (0)
-
/* Stop speculative execution */
static inline void sync_core(void)
{
Index: linux/include/asm-i386/processor-cyrix.h
===================================================================
--- /dev/null
+++ linux/include/asm-i386/processor-cyrix.h
@@ -0,0 +1,30 @@
+/*
+ * NSC/Cyrix CPU indexed register access. Must be inlined instead of
+ * macros to ensure correct access ordering
+ * Access order is always 0x22 (=offset), 0x23 (=value)
+ *
+ * When using the old macros a line like
+ * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88);
+ * gets expanded to:
+ * do {
+ * outb((CX86_CCR2), 0x22);
+ * outb((({
+ * outb((CX86_CCR2), 0x22);
+ * inb(0x23);
+ * }) | 0x88), 0x23);
+ * } while (0);
+ *
+ * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23).
+ */
+
+static inline u8 getCx86(u8 reg)
+{
+ outb(reg, 0x22);
+ return inb(0x23);
+}
+
+static inline void setCx86(u8 reg, u8 data)
+{
+ outb(reg, 0x22);
+ outb(data, 0x23);
+}
Index: linux/arch/i386/kernel/cpu/cyrix.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/cyrix.c
+++ linux/arch/i386/kernel/cpu/cyrix.c
@@ -4,7 +4,7 @@
#include <linux/pci.h>
#include <asm/dma.h>
#include <asm/io.h>
-#include <asm/processor.h>
+#include <asm/processor-cyrix.h>
#include <asm/timer.h>
#include <asm/pci-direct.h>
#include <asm/tsc.h>
Index: linux/arch/i386/kernel/cpu/mtrr/cyrix.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/mtrr/cyrix.c
+++ linux/arch/i386/kernel/cpu/mtrr/cyrix.c
@@ -3,6 +3,7 @@
#include <asm/mtrr.h>
#include <asm/msr.h>
#include <asm/io.h>
+#include <asm/processor-cyrix.h>
#include "mtrr.h"
int arr3_protected;
Index: linux/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
+++ linux/arch/i386/kernel/cpu/cpufreq/gx-suspmod.c
@@ -79,7 +79,7 @@
#include <linux/smp.h>
#include <linux/cpufreq.h>
#include <linux/pci.h>
-#include <asm/processor.h>
+#include <asm/processor-cyrix.h>
#include <asm/errno.h>
/* PCI config registers, all at F0 */
Index: linux/include/asm-x86_64/processor.h
===================================================================
--- linux.orig/include/asm-x86_64/processor.h
+++ linux/include/asm-x86_64/processor.h
@@ -389,17 +389,6 @@ static inline void prefetchw(void *x)
#define cpu_relax() rep_nop()
-/*
- * NSC/Cyrix CPU indexed register access macros
- */
-
-#define getCx86(reg) ({ outb((reg), 0x22); inb(0x23); })
-
-#define setCx86(reg, data) do { \
- outb((reg), 0x22); \
- outb((data), 0x23); \
-} while (0)
-
static inline void serialize_cpu(void)
{
__asm__ __volatile__ ("cpuid" : : : "ax", "bx", "cx", "dx");
Index: linux/arch/i386/kernel/cpu/mtrr/state.c
===================================================================
--- linux.orig/arch/i386/kernel/cpu/mtrr/state.c
+++ linux/arch/i386/kernel/cpu/mtrr/state.c
@@ -3,6 +3,7 @@
#include <asm/io.h>
#include <asm/mtrr.h>
#include <asm/msr.h>
+#include <asm-i386/processor-cyrix.h>
#include "mtrr.h"
next prev parent reply other threads:[~2007-07-20 15:35 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-07-20 15:32 [PATCH] [0/11] Some more x86 patches for review Andi Kleen
2007-07-20 15:32 ` [PATCH] [1/11] i386: Reserve the right performance counter for the Intel PerfMon NMI watchdog Andi Kleen
2007-07-20 15:32 ` [PATCH] [2/11] x86: Fix alternatives and kprobes to remap write-protected kernel text Andi Kleen
2007-07-20 15:59 ` Mathieu Desnoyers
2007-07-23 14:46 ` Mathieu Desnoyers
2007-07-23 15:01 ` Andi Kleen
2007-07-23 15:25 ` Mathieu Desnoyers
2007-07-24 6:06 ` Rusty Russell
2007-07-24 13:57 ` Mathieu Desnoyers
2007-07-24 15:17 ` Jeremy Fitzhardinge
2007-07-24 15:20 ` Mathieu Desnoyers
2007-07-20 15:32 ` [PATCH] [3/11] x86: Stop MCEs and NMIs during code patching Andi Kleen
2007-07-20 15:45 ` Jeremy Fitzhardinge
2007-07-20 16:03 ` Mathieu Desnoyers
2007-07-20 15:32 ` [PATCH] [4/11] x86_64: Set K8 CPUID flag for K8/Fam10h/Fam11h Andi Kleen
2007-07-20 15:32 ` [PATCH] [5/11] x86: Unify alternative nop handling between i386 and x86-64 Andi Kleen
2007-07-20 15:32 ` [PATCH] [6/11] i386: Tune AMD Fam10h/11h like K8 Andi Kleen
2007-07-20 15:32 ` [PATCH] [7/11] i386: Do not include other cpus' interrupt 0 in nmi_watchdog Andi Kleen
2007-07-20 15:32 ` [PATCH] [8/11] x86_64: x86_64 - Use non locked version for local_cmpxchg() Andi Kleen
2007-07-20 15:32 ` Andi Kleen [this message]
2007-07-21 12:00 ` [PATCH] [9/11] x86: Replace NSC/Cyrix specific chipset access macros by inlined functions Alexey Dobriyan
2007-07-21 12:04 ` Andi Kleen
2007-07-22 10:45 ` Juergen Beisert
2007-07-20 15:32 ` [PATCH] [10/11] i386: Handle P6s without performance counters in nmi watchdog Andi Kleen
2007-07-20 15:32 ` [PATCH] [11/11] i386: Use patchable lock prefix in set_64bit Andi Kleen
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