From: Nick Piggin <npiggin@suse.de>
To: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
Linus Torvalds <torvalds@linux-foundation.org>,
Andi Kleen <ak@suse.de>
Subject: [rfc][patch 2/3] x86: fix IO write barriers
Date: Thu, 4 Oct 2007 07:22:58 +0200 [thread overview]
Message-ID: <20071004052258.GB15131@wotan.suse.de> (raw)
In-Reply-To: <20071004052153.GA15131@wotan.suse.de>
wmb() on x86 must always include a barrier, because stores can go out of
order in many cases when dealing with devices (eg. WC memory).
Signed-off-by: Nick Piggin <npiggin@suse.de>
Index: linux-2.6/include/asm-i386/system.h
===================================================================
--- linux-2.6.orig/include/asm-i386/system.h
+++ linux-2.6/include/asm-i386/system.h
@@ -216,6 +216,7 @@ static inline unsigned long get_limit(un
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
+#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
/**
* read_barrier_depends - Flush all pending reads that subsequents reads
@@ -271,18 +272,14 @@ static inline unsigned long get_limit(un
#define read_barrier_depends() do { } while(0)
-#ifdef CONFIG_X86_OOSTORE
-/* Actually there are no OOO store capable CPUs for now that do SSE,
- but make it already an possibility. */
-#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
-#else
-#define wmb() __asm__ __volatile__ ("": : :"memory")
-#endif
-
#ifdef CONFIG_SMP
#define smp_mb() mb()
#define smp_rmb() rmb()
-#define smp_wmb() wmb()
+#ifdef CONFIG_X86_OOSTORE
+# define smp_wmb() wmb()
+#else
+# define smp_wmb() barrier()
+#endif
#define smp_read_barrier_depends() read_barrier_depends()
#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
#else
Index: linux-2.6/include/asm-x86_64/system.h
===================================================================
--- linux-2.6.orig/include/asm-x86_64/system.h
+++ linux-2.6/include/asm-x86_64/system.h
@@ -159,12 +159,8 @@ static inline void write_cr8(unsigned lo
*/
#define mb() asm volatile("mfence":::"memory")
#define rmb() asm volatile("lfence":::"memory")
-
-#ifdef CONFIG_UNORDERED_IO
#define wmb() asm volatile("sfence" ::: "memory")
-#else
-#define wmb() asm volatile("" ::: "memory")
-#endif
+
#define read_barrier_depends() do {} while(0)
#define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
next prev parent reply other threads:[~2007-10-04 5:23 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-04 5:21 [rfc][patch 1/3] x86_64: fence nontemproal stores Nick Piggin
2007-10-04 5:22 ` Nick Piggin [this message]
2007-10-04 17:32 ` [rfc][patch 2/3] x86: fix IO write barriers Dave Jones
2007-10-04 17:53 ` Andi Kleen
2007-10-04 18:10 ` Dave Jones
2007-10-04 18:21 ` Andi Kleen
2007-10-04 18:41 ` Dave Jones
2007-10-04 18:58 ` Andi Kleen
2007-10-04 19:08 ` Dave Jones
2007-10-04 20:52 ` Alan Cox
2007-10-04 5:23 ` [rfc][patch 3/3] x86: optimise barriers Nick Piggin
2007-10-12 8:25 ` Jarek Poplawski
2007-10-12 8:42 ` Helge Hafting
2007-10-12 9:12 ` Jarek Poplawski
2007-10-12 9:44 ` Nick Piggin
2007-10-12 10:04 ` Jarek Poplawski
2007-10-12 12:44 ` Helge Hafting
2007-10-12 13:29 ` Jarek Poplawski
2007-10-15 10:17 ` Helge Hafting
2007-10-15 11:53 ` Jarek Poplawski
2007-10-12 8:57 ` Nick Piggin
2007-10-12 9:55 ` Jarek Poplawski
2007-10-12 10:42 ` Nick Piggin
2007-10-12 11:55 ` Jarek Poplawski
2007-10-12 12:10 ` Jarek Poplawski
2007-10-12 15:13 ` Linus Torvalds
2007-10-15 7:44 ` Jarek Poplawski
2007-10-15 8:09 ` Nick Piggin
2007-10-15 9:10 ` Jarek Poplawski
2007-10-15 9:24 ` Jarek Poplawski
2007-10-16 0:50 ` Nick Piggin
2007-10-16 9:00 ` Jarek Poplawski
2007-10-16 9:14 ` david
2007-10-16 12:49 ` Jarek Poplawski
2007-10-15 14:38 ` David Schwartz
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