From: Kristoffer Ericson <kristoffer.ericson@gmail.com>
To: Paul Mundt <lethal@linux-sh.org>
Cc: linuxsh <linuxsh-dev@lists.sourceforge.net>,
linux-main <linux-kernel@vger.kernel.org>
Subject: [PATCH / HP6XX] : Add Timer values into HD64461.h
Date: Thu, 18 Oct 2007 21:39:04 -0700 [thread overview]
Message-ID: <20071018213904.c0be3b03.Kristoffer.ericson@gmail.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 2586 bytes --]
Greetings,
Shortlog:
This patch adds HD64461 Timer adresses & registers to the HD64461 header file (/include/asm-sh/hd64461.h).
The timers (TMU0 & TMU1) can hold 16bit values and auto loads the counter constant when it
reaches zero. Upon reaching zero it generates an interrupt.
Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h
index 342ca55..52fcb7e 100644
--- a/include/asm-sh/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -225,9 +225,34 @@
#define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000)
#define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002)
-#define HD64461_IRQBASE OFFCHIP_IRQ_BASE
-#define OFFCHIP_IRQ_BASE 64
-#define HD64461_IRQ_NUM 16
+/* Timer control adresses */
+#define HD64461_TMU_TCVR1 (CONFIG_HD64461_IOBASE + 0x6000) /* Timer 1 Constant value register */
+#define HD64461_TMU_TCVR0 (CONFIG_HD64461_IOBASE + 0x6002) /* Timer 0 Constant value register */
+#define HD64461_TMU_TRVR1 (CONFIG_HD64461_IOBASE + 0x6004) /* Timer 1 Read value register */
+#define HD64461_TMU_TRVR0 (CONFIG_HD64461_IOBASE + 0x6006) /* Timer 0 Read value register */
+#define HD64461_TMU_TCR1 (CONFIG_HD64461_IOBASE + 0x6008) /* Timer 1 Control register */
+#define HD64461_TMU_TCR0 (CONFIG_HD64461_IOBASE + 0x600a) /* Timer 0 Control register */
+#define HD64461_TMU_TIRR (CONFIG_HD64461_IOBASE + 0x600c) /* Timer interrupt request register */
+#define HD64461_TMU_TER (CONFIG_HD64461_IOBASE + 0x600e) /* Timer interrupt enable register */
+
+/* Timer Control Register */
+#define HD64461_TMU_TCR_ENA 0x08 /* Enable timer output TM0x */
+#define HD64461_TMU_TCR_SCL1 0x06 /* CKIO */ /* remember that CKIO / 16 = inverted 0x06 */
+#define HD64461_TMU_TCR_SCL4 0x04 /* CKIO / 4 */
+#define HD64461_TMU_TCR_SCL8 0x02 /* CKIO / 8 */
+#define HD64461_TMU_TCR_STRT 0x01 /* start counting TM0x */
+
+/* Timer Interrupt Request Register */
+#define HD64461_TMU_TIRR_TMU1 0x02 /* Interrupt request from Timer 1 */
+#define HD64461_TMU_TIRR_TMU0 0x01 /* Interrupt request from Timer 0 */
+
+/* Timer Interrupt Enable Register */
+#define HD64461_TMU_TIMR_TMU1 0x02 /* Interrupt request from Timer 1 is masked */
+#define HD64461_TMU_TIMR_TMU0 0x01 /* Interrupt request from Timer 0 is masked */
+
+#define HD64461_IRQBASE OFFCHIP_IRQ_BASE /* After here we can set HD64461 interrupts */
+#define OFFCHIP_IRQ_BASE 64 /* SuperH 7709 Interrupts */
+#define HD64461_IRQ_NUM 16 /* Number of HD64461 Interrupts */
#define HD64461_IRQ_UART (HD64461_IRQBASE+5)
#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6)
[-- Attachment #2: hp6xx-hd64461.h-tmu-values.patch --]
[-- Type: application/octet-stream, Size: 2239 bytes --]
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h
index 342ca55..52fcb7e 100644
--- a/include/asm-sh/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -225,9 +225,34 @@
#define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000)
#define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002)
-#define HD64461_IRQBASE OFFCHIP_IRQ_BASE
-#define OFFCHIP_IRQ_BASE 64
-#define HD64461_IRQ_NUM 16
+/* Timer control adresses */
+#define HD64461_TMU_TCVR1 (CONFIG_HD64461_IOBASE + 0x6000) /* Timer 1 Constant value register */
+#define HD64461_TMU_TCVR0 (CONFIG_HD64461_IOBASE + 0x6002) /* Timer 0 Constant value register */
+#define HD64461_TMU_TRVR1 (CONFIG_HD64461_IOBASE + 0x6004) /* Timer 1 Read value register */
+#define HD64461_TMU_TRVR0 (CONFIG_HD64461_IOBASE + 0x6006) /* Timer 0 Read value register */
+#define HD64461_TMU_TCR1 (CONFIG_HD64461_IOBASE + 0x6008) /* Timer 1 Control register */
+#define HD64461_TMU_TCR0 (CONFIG_HD64461_IOBASE + 0x600a) /* Timer 0 Control register */
+#define HD64461_TMU_TIRR (CONFIG_HD64461_IOBASE + 0x600c) /* Timer interrupt request register */
+#define HD64461_TMU_TER (CONFIG_HD64461_IOBASE + 0x600e) /* Timer interrupt enable register */
+
+/* Timer Control Register */
+#define HD64461_TMU_TCR_ENA 0x08 /* Enable timer output TM0x */
+#define HD64461_TMU_TCR_SCL1 0x06 /* CKIO */ /* remember that CKIO / 16 = inverted 0x06 */
+#define HD64461_TMU_TCR_SCL4 0x04 /* CKIO / 4 */
+#define HD64461_TMU_TCR_SCL8 0x02 /* CKIO / 8 */
+#define HD64461_TMU_TCR_STRT 0x01 /* start counting TM0x */
+
+/* Timer Interrupt Request Register */
+#define HD64461_TMU_TIRR_TMU1 0x02 /* Interrupt request from Timer 1 */
+#define HD64461_TMU_TIRR_TMU0 0x01 /* Interrupt request from Timer 0 */
+
+/* Timer Interrupt Enable Register */
+#define HD64461_TMU_TIMR_TMU1 0x02 /* Interrupt request from Timer 1 is masked */
+#define HD64461_TMU_TIMR_TMU0 0x01 /* Interrupt request from Timer 0 is masked */
+
+#define HD64461_IRQBASE OFFCHIP_IRQ_BASE /* After here we can set HD64461 interrupts */
+#define OFFCHIP_IRQ_BASE 64 /* SuperH 7709 Interrupts */
+#define HD64461_IRQ_NUM 16 /* Number of HD64461 Interrupts */
#define HD64461_IRQ_UART (HD64461_IRQBASE+5)
#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6)
next reply other threads:[~2007-10-18 19:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-10-19 4:39 Kristoffer Ericson [this message]
2007-10-19 3:49 ` Paul Mundt
2007-10-20 21:39 ` Kristoffer Ericson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20071018213904.c0be3b03.Kristoffer.ericson@gmail.com \
--to=kristoffer.ericson@gmail.com \
--cc=lethal@linux-sh.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxsh-dev@lists.sourceforge.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
Powered by JetHome