Re: spi transfer with zero length

[Atsushi Nemoto <anemo@mba.ocn.ne.jp>]

On Sat, 16 Feb 2008 10:58:48 -0800, David Brownell <david-b@pacbell.net> wrote:
> On Saturday 16 February 2008, Atsushi Nemoto wrote:
> > Hi.  Is it legal to use zero for 'len' field of struct spi_transfer?
> > I mean, len=0, tx_buf=rx_buf=NULL, delay_usecs!=0.
> 
> Yes that should work ... it's uncommon, but not illegal.  Some
> controller drivers may even handle that right!
> 
> If the delay were zero and cs_change didn't indicate a need to
> briefly deselect the chip, it might make sense to reject such
> a NOP transfer.  But that's not the case you identify.

Thank you.  I suppose spi-bitbang can handle that right.  Then I'm
going to fix drivers if it cannot handle such case.

> > Some SPI devices need slightly long delay before first CLK edge after
> > CS assertion.
> 
> For future reference ... could you identify a few such devices,
> and say what "long" is relative to the clock period?
> 
> Some folk have just slowed down the clock in such cases, but
> that's rather sub-optimal.

Well, the device I have is so special custom one implemented by PIC or
something.  It needs 100us or so with 200ns clock period.  Slowing
down might be an another solution but some spi driver cannot use such
a slow bitrate (~10KHz).

> > To achieve this, I think inserting using a zero length 
> > transfer before real transfers.  But it seems some drivers do not
> > handle this case properly.
> 
> Feel free to submit patches fixing those bugs.

OK, if I had enough time to make a patch for uptodate version of the
driver ;)

---
Atsushi Nemoto