Re: Update cacheline size on X86_GENERIC

["Rafael J. Wysocki" <rjw@sisk.pl>]

On Saturday, 11 of October 2008, Andi Kleen wrote:
> On Sat, Oct 11, 2008 at 07:29:19PM +1100, Nick Piggin wrote:
> > I also think there are reasonable arguments the other way, and I
> > personally also think it might be better to leave it 128 (even
> > if it is unlikely, introducing a regression is not good).
> 
> The issue is also that the regression will be likely large.
> False sharing can really hurt when it hits as you know, because
> the penalties are so large.
> 
> > > There are millions and millions of P4s around.
> > > And they're not that old, they're still shipping in fact.
> > 
> > Still shipping in anything aside from 1s systems?
> 
> Remember the first Core2 based 4S (Tigerton) Xeon was only introduced last year 
> and that market is quite conservative. For 2S it's a bit longer, but
> it wouldn't surprise me there if new systems are still shipping.
> 
> Also to be honest I doubt the theory that older systems
> are never upgraded to newer OS.

Actaually, I have examples to the contrary. :-)

Thanks,
Rafael