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Date: Sat, 11 Oct 2008 21:40:43 +0100
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Cc: mingo@elte.hu, torvalds@linux-foundation.org
Subject: Looks broken to me: x86, cyrix: debug
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On Sat, 11 Oct 2008 20:03:32 GMT
Linux Kernel Mailing List <linux-kernel@vger.kernel.org> wrote:

> Gitweb:     http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=026e2c05ef58ef413e2d52696f125d5ea1aa8bce
> Commit:     026e2c05ef58ef413e2d52696f125d5ea1aa8bce
> Parent:     93ded9b8fd42abe2c3607097963d8de6ad9117eb
> Author:     Ingo Molnar <mingo@elte.hu>
> AuthorDate: Tue Jul 22 11:58:14 2008 +0200
> Committer:  Ingo Molnar <mingo@elte.hu>
> CommitDate: Tue Jul 22 12:24:00 2008 +0200
> 
>     x86, cyrix: debug

Looks broken to me:

>  	/* Load/Store Serialize to mem access disable (=reorder it) */
> -	setCx86(CX86_PCR0, getCx86(CX86_PCR0) & ~0x80);
> +	setCx86_old(CX86_PCR0, getCx86_old(CX86_PCR0) & ~0x80);

Three problems:

1.

> +#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); })

Doesn't expand to any kind of returned value.

 +#define setCx86_old(reg, data) do { \
> +	outb((reg), 0x22); \
> +	outb((data), 0x23); \
> +} while (0)

2. 
And even if it did it would seem to expand to

	outb reg, 0x22
	outb reg, 0x22
	inb 0x23
	outb something, 0x23

which doesn't in fact work as the outb/inb or outb/outb to 0x22/0x23 must
be paired.

3.

What exactly does fiddling with stuff like the memory access ordering
(which is rather important!) have to do with a single oneliner "cyrix:
debug" title and no changelog.


Alan