mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Nick Warne <nick@ukfsn.org>
To: Len Brown <lenb@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: Re: [QUESTION] Rather high /proc/interrupts ERR count
Date: Mon, 29 Dec 2008 11:17:16 +0000	[thread overview]
Message-ID: <20081229111716.74131849@sauron.linicks.net> (raw)
In-Reply-To: <alpine.LFD.2.00.0812282225380.4738@localhost.localdomain>

On Sun, 28 Dec 2008 22:39:32 -0500 (EST)
Len Brown <lenb@kernel.org> wrote:

> 
> On Fri, 26 Dec 2008, Nick Warne wrote:

> > ERR:     354616
> > MIS:          0
> 
> 21189+333431 = 354620
> 
> So virtually all of the ERR's are from IRQ7,
> which is how  the PIC identifies interrupts
> when it has no idea of the real source.
> 
> The PIC actually doesn't have a concept of directing
> interrupts to non CPU0, and the fact that CPU1
> on this box thinks it receives some of the interrupts
> is in the undocumented area known as "implementation specific"
> or maybe stated as "don't do this at home".
> 
> So the better thing to focus on would be how to get rid of
> "noapic" on your cmdline and get the system into IOAPIC
> mode, as it was designed to be.

Thanks Len - you explained it to me perfectly, and as suggested:

           CPU0       CPU1       
  0:        121        494   IO-APIC-edge      timer
  1:         17      20796   IO-APIC-edge      i8042
  6:          0          3   IO-APIC-edge      floppy
  7:          1          0   IO-APIC-edge    
  8:          0          1   IO-APIC-edge      rtc0
  9:          0          0   IO-APIC-fasteoi   acpi
 14:          2        139   IO-APIC-edge      pata_amd
 15:          0          0   IO-APIC-edge      pata_amd
 16:         86      85163   IO-APIC-fasteoi   nvidia
 20:          0          4   IO-APIC-fasteoi   ehci_hcd:usb1
 21:          0          0   IO-APIC-fasteoi   sata_nv
 22:        570     404175   IO-APIC-fasteoi   sata_nv, Intel ICH
 23:       1236    8996739   IO-APIC-fasteoi   ohci_hcd:usb2, eth0
NMI:          0          0   Non-maskable interrupts
LOC:    4497869    5381066   Local timer interrupts
RES:     999249     570052   Rescheduling interrupts
CAL:     105254     112444   Function call interrupts
TLB:      14640       6594   TLB shootdowns
TRM:          0          0   Thermal event interrupts
THR:          0          0   Threshold APIC interrupts
SPU:          0          0   Spurious interrupts
ERR:          1
MIS:          0

Now appears fine (I get one ERR at boot, for some reason).

Thanks for the information.

Nick
-- 
Free Software Foundation Associate Member 5508
http://linicks.net/

      reply	other threads:[~2008-12-29 11:17 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-12-26  8:53 Nick Warne
2008-12-29  3:39 ` Len Brown
2008-12-29 11:17   ` Nick Warne [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20081229111716.74131849@sauron.linicks.net \
    --to=nick@ukfsn.org \
    --cc=lenb@kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®