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From: Nifty Fedora Mitch <niftyfedora@niftyegg.com>
To: Justin Piszcz <jpiszcz@lucidpixels.com>
Cc: linux-kernel@vger.kernel.org, linux-raid@vger.kernel.org,
	linux-ide-arrays@lists.math.uh.edu
Subject: Re: [Benchmarks] How do I set the memory invalidate bit for a 3ware 9550SXU-12 controller?
Date: Sun, 11 Jan 2009 11:27:42 -0800	[thread overview]
Message-ID: <20090111192742.GA3784@compegg.wr.niftyegg.com> (raw)
In-Reply-To: <alpine.DEB.1.10.0901080846430.29454@p34.internal.lan>

On Thu, Jan 08, 2009 at 09:20:30AM -0500, Justin Piszcz wrote:
> Subject: [Benchmarks] How do I set the memory invalidate bit for a 3ware 9550SXU-12 controller?
> 
> System = RHEL5 x86_64
> Kernel = 2.6.18-53.1.13.el5
>
> Per: http://makarevitch.org/rant/raid/
> It states: "A potential culprit, at least for slow write operations, lies in Q12546. I played with setpci in order to enable this ''Memory Write and Invalidate' (lspci now shows that the 3Ware controller 9550 is in 'MemWINV+' instead of 'MemWINV-' mode), maybe enhancing write throughput. The 9650 is in 'MemWINV-' mode. This seems somewhat frequent with SuperMicro mainboards, check this with your system integrator or SuperMicro support service. This may be somewhat tied to the "interleaved memory". With the 9650 my PCI parameters are as follows:"
>
> Links to: http://www.3ware.com/KB/article.aspx?id=12546
>
> How do I change MemWINV+ to MemWINV- using setpci?

Since this is a SuperMicro motherboard double check the BIOS settings
involved with MTRR registers.  Since Windows uses PAT its drivers will often
ignore BIOS settings that Linux will not.


-- 
	T o m  M i t c h e l l 
	Found me a new hat, now what?


      parent reply	other threads:[~2009-01-11 19:27 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-01-08 14:20 Justin Piszcz
2009-01-08 15:04 ` David Lethe
2009-01-08 22:52 ` adam radford
2009-01-11 19:27 ` Nifty Fedora Mitch [this message]

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