From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: David Woodhouse <dwmw2@infradead.org>
Cc: Yu Zhao <yu.zhao@intel.com>,
linux-pci@vger.kernel.org, iommu@lists.linux-foundation.org,
kvm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/6] PCI: support the ATS capability
Date: Wed, 11 Feb 2009 09:33:44 -0800 [thread overview]
Message-ID: <200902110933.44861.jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1234265550.10484.62.camel@macbook.infradead.org>
On Tuesday, February 10, 2009 3:32 am David Woodhouse wrote:
> On Sun, 2009-01-18 at 12:17 +0800, Yu Zhao wrote:
> > The ATS spec can be found at
> > http://www.pcisig.com/specifications/iov/ats/ (it requires membership).
> >
> > Signed-off-by: Yu Zhao <yu.zhao@intel.com>
>
> If I can have an ack from Jesse for the PCI bits (which is basically
> this patch), I'll take the whole lot through my iommu tree. OK?
Yep, looks fine.
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2009-02-11 17:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-01-18 4:17 [PATCH v2 0/6] ATS capability support for Intel IOMMU Yu Zhao
2009-01-18 4:17 ` [PATCH v2 1/6] PCI: support the ATS capability Yu Zhao
2009-02-10 11:32 ` David Woodhouse
2009-02-11 17:33 ` Jesse Barnes [this message]
2009-02-11 17:38 ` Matthew Wilcox
2009-01-18 4:17 ` [PATCH v2 2/6] VT-d: parse ATSR in DMA Remapping Reporting Structure Yu Zhao
2009-01-18 4:17 ` [PATCH v2 3/6] VT-d: add queue invalidation fault status support Yu Zhao
2009-01-18 4:17 ` [PATCH v2 4/6] VT-d: add device IOTLB invalidation support Yu Zhao
2009-01-18 4:17 ` [PATCH v2 5/6] VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps Yu Zhao
2009-01-18 4:17 ` [PATCH v2 6/6] VT-d: support the device IOTLB Yu Zhao
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