From: Kyle McMartin <kyle@mcmartin.ca>
To: arnd@arndb.de
Cc: liqin.chen@sunplusct.com, linux-arch@vger.kernel.org,
linux-kernel@vger.kernel.org, torvalds@linux-foundation.org,
monstr@monstr.eu, john.williams@petalogix.com
Subject: Re: [PATCH 7/13] score - New architecure port to SunplusCT S+CORE processor
Date: Fri, 27 Mar 2009 13:09:03 -0400 [thread overview]
Message-ID: <20090327170903.GC29999@bombadil.infradead.org> (raw)
In-Reply-To: <200903271705.29903.arnd@arndb.de>
On Fri, Mar 27, 2009 at 05:05:29PM +0100, arnd@arndb.de wrote:
> > +config MACH_SPCT6600
> > + bool "SPCT6600 series based machines"
> > + select SYS_SUPPORTS_32BIT_KERNEL
> > + select SYS_SUPPORTS_LITTLE_ENDIAN
> > + select CPU_SCORE7
> > + select GENERIC_HAS_IOMAP
> > +
Huh, is it intended to add big endian support? <asm/byteorder.h>
was just including <asm-generic/little_endian.h> and should probably
be conditional on your SYS_SUPPROTS_BIG_ENDIAN if so...
I've dug a bit at your code for this, and can't see where you obviously
set a byte order bit in a control register... is it hard wired on the
board?
regards, Kyle
prev parent reply other threads:[~2009-03-27 17:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-03-27 1:41 liqin.chen
2009-03-27 16:05 ` arnd
2009-03-27 17:09 ` Kyle McMartin [this message]
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