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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: "Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com>
Cc: Eric Anholt <eric@anholt.net>,
	lkml <linux-kernel@vger.kernel.org>,
	"Siddha, Suresh B" <suresh.b.siddha@intel.com>
Subject: Re: PAGE_CACHE_WC strikes again
Date: Tue, 31 Mar 2009 17:49:43 -0700	[thread overview]
Message-ID: <20090331174943.59fabcb8@hobbes> (raw)
In-Reply-To: <7E82351C108FA840AB1866AC776AEC4657F48B3E@orsmsx505.amr.corp.intel.com>

On Tue, 31 Mar 2009 17:29:02 -0700
"Pallipadi, Venkatesh" <venkatesh.pallipadi@intel.com> wrote:

>  
> 
> >-----Original Message-----
> >From: Jesse Barnes [mailto:jbarnes@virtuousgeek.org] 
> >Sent: Tuesday, March 31, 2009 5:15 PM
> >To: Eric Anholt
> >Cc: lkml; Pallipadi, Venkatesh
> >Subject: Re: PAGE_CACHE_WC strikes again
> >
> >On Tue, 31 Mar 2009 17:10:47 -0700
> >Eric Anholt <eric@anholt.net> wrote:
> >
> >> I just tracked down what was cutting performance 10x on one of my
> >> systems on a microbenchmark I'd just written:
> >> 
> >> --- a/drivers/gpu/drm/drm_gem.c
> >> +++ b/drivers/gpu/drm/drm_gem.c
> >> @@ -540,7 +540,7 @@ int drm_gem_mmap(struct file *filp, struct
> >> vm_area_struct *vma)
> >>  	/* FIXME: use pgprot_writecombine when available */
> >>  	prot = pgprot_val(vma->vm_page_prot);
> >>  #ifdef CONFIG_X86
> >> -	prot |= _PAGE_CACHE_WC;
> >> +	/*prot |= _PAGE_CACHE_WC;*/
> >>  #endif
> >>  	vma->vm_page_prot = __pgprot(prot);
> >>  
> >> Turns out that setting PAGE_CACHE_WC disables the WC effect of the
> >> MTRR on my non-PAT (disabled due to CPU errata) 945GM 
> >system, and this
> >> workaround took GTT-mapped writes from 120MB/s to 1180MB/s.
> >
> >What the...  There's a pgprot_writecombine now, but it basically does
> >the same thing.  Why is WC so broken?  Venki is the fix for this
> >covered in your last patchset?
> >
> 
> The key point here is 
> 
> > setting PAGE_CACHE_WC disables the WC effect of the
> > MTRR on my non-PAT (disabled due to CPU errata)
> 
> When PAT is disabled, the default setting in PAT MSR is
> 00 - WB
> 01 - WT
> 10 - UC_MINUS
> 11 - UC
> 
> There is no way to set WC with PAT. By hardcoding _PAGE_CACHE_WC
> (which is 01) the driver is basically selecting write-through!
> 
> And when MTRR says WC and PAT says WT, effective type is UC.
> 
> Basically, no one should be hard-coding the memory type. Please use
> pgprot_writecombine() which does the right thing by using WC
> (when PAT is enabled) or UC_MINUS (when PAT is disabled).

Ah ok, that makes sense.  I'm glad we have pgprot_writecombine now
(sorry Eric I should have sent that patch along with my patch
containing the vm_insert_pfn -EINVAL handling).

-- 
Jesse Barnes, Intel Open Source Technology Center

  reply	other threads:[~2009-04-01  0:49 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-04-01  0:10 Eric Anholt
2009-04-01  0:14 ` Jesse Barnes
2009-04-01  0:29   ` Pallipadi, Venkatesh
2009-04-01  0:49     ` Jesse Barnes [this message]
2009-04-01  1:03     ` Suresh Siddha
2009-04-01  1:12       ` Jesse Barnes
2009-04-01  1:30         ` Suresh Siddha
2009-04-01  1:57           ` Jesse Barnes
2009-04-01  3:18             ` Dave Airlie
2009-04-01  3:17         ` Pallipadi, Venkatesh
2009-04-01  1:22       ` Jesse Barnes

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