Re: [PATCH 0/7] ASIC3 support for tmio_mmc

[Pierre Ossman <pierre@ossman.eu>]

[-- Attachment #1: Type: text/plain, Size: 1241 bytes --]

On Thu,  4 Jun 2009 20:12:30 +0200
Philipp Zabel <philipp.zabel@gmail.com> wrote:

> I've broken the long lines in patches 1-3 and merged the fix into patch 2:
>  [PATCH 1/7] MFD,mmc: tmio_mmc: make HCLK configurable (v2)
>  [PATCH 2/7] mmc: tmio_mmc: add bus_shift support (v2)
>  [PATCH 3/7] mmc: tmio_mmc: don't use set_irq_type (v2)
>  [PATCH 4/7] mmc: tmio_mmc: correct probe return value for num_resources != 3
> Also I've added three new patches for your consideration. Patch 5 delays mapping
> of the SD control registers because mfd_cell->enable has to enable the RAM first.
> Patch 6 fixes a bug in the SDCLK divider calculation and patch 7 finally enables
> compilation of tmio_mmc for ASIC3:
>  [PATCH 5/7] mmc: tmio_mmc: map SD control registers after enabling the MFD cell
>  [PATCH 6/7] mmc: tmio_mmc: fix SDCLK divider setting
>  [PATCH 7/7] mmc: tmio_mmc: allow compilation for ASIC3
> 

I've queued up everything except patch 7 as I haven't seen Ian's
response on that yet.

Rgds
-- 
     -- Pierre Ossman

  WARNING: This correspondence is being monitored by the
  Swedish government. Make sure your server uses encryption
  for SMTP traffic and consider using PGP for end-to-end
  encryption.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 198 bytes --]