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Date: Mon, 19 Oct 2009 09:17:40 +0200
From: Ingo Molnar <mingo@elte.hu>
To: linguranus@gmail.com, "H. Peter Anvin" <hpa@zytor.com>,
       Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC] [X86] performance improvement for memcpy_64.S by
	avoid memory miss predication.
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* linguranus@gmail.com <linguranus@gmail.com> wrote:

> From: Ling <linguranus@gmail.com>
> 
> Hi All
> 
> CPU will use memory disambiguration predication to speculatively read 
> memory without waiting for previous write instructions and correctly 
> avoid conflict between them (RAW). However it seem only to care about 
> last 12 bits of address, not care about real address. For example if 
> rsi is 0xf004, rdi is 0xe008, when we do following operation there 
> will generate big performance latency.

Would be nice to trigger this kind of pattern via some testcase that 
uses read() or write() - or some other real workload.

Then you can use 'perf stat --repeat 10 ./my-test-prog' to measure it 
and post the results - the before-patch/after-patch instruction count, 
cycle count, etc.

You can get 'perf' via:

  cd tools/perf
  make -j install

(And please preserve the Cc: line for new postings - thanks.)

Thanks,

	Ingo