Re: [PATCH] x86/pci: intel bus root res with IOH reading -v2

[Bjorn Helgaas <bjorn.helgaas@hp.com>]

On Tuesday 06 October 2009 11:51:22 am Yinghai Lu wrote:
> > What is the specific problem solved by this patch?  Does "pci=use_crs"
> > address any of that problem?  (I know "pci=use_crs" breaks some machines,
> > and I know it's unacceptable to require users to use it.  But I want to
> > understand whether the concept is related, and whether you've tripped
> > over a BIOS defect or a Linux pci_root.c defect.)
> 
> BIOS doesn't allocate resource to some pci devices when too many devices. and need kernel to allocate resource ( 32bit mmio, 64 mmio)
> to those devices.
> current only known fw that can allocate mmio 64 ( with correct setting) is LinuxBIOS.
> 
> also could help os to fend off some range that is wrongly allocated by BIOS that is cross the boundary between different peer root bus.
> 
> _CRS doesn't report any MMIO 64 range, even HW does have that set.

This discussion got derailed into "BIOS bad, Linux good" before I
could learn more about the specific problem you're solving.

Can you tell us what machine this fixes?  Can you include logs, e.g.,
dmesg/lspci/iomem, that show the problem, and corresponding ones
with your patch applied that show the fix?

Has the machine been released?  Does Windows work on it?

I'd also like to know more about the "range that is wrongly allocated
by BIOS that is cross the boundary between different peer root bus."
Does this mean the BIOS programmed the host bridges wrong, or does it
mean it reported something invalid in the host bridge _CRS, or something
else?

Thanks,
  Bjorn