Re: [PATCH v4] x86: under bios control, restore AP's APIC_LVTTHMR to the BSP value

[Yong Wang <yong.y.wang@linux.intel.com>]

On Mon, Nov 09, 2009 at 01:29:19PM +0100, Borislav Petkov wrote:
> On Mon, Nov 09, 2009 at 07:47:52PM +0800, Yong Wang wrote:
> 
> [..]
> 
> > diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> > index 0a64353..e6f0ef9 100644
> > --- a/arch/x86/kernel/setup.c
> > +++ b/arch/x86/kernel/setup.c
> > @@ -110,6 +110,7 @@
> >  #ifdef CONFIG_X86_64
> >  #include <asm/numa_64.h>
> >  #endif
> > +#include <asm/mce.h>
> >  
> >  /*
> >   * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
> > @@ -1040,6 +1041,8 @@ void __init setup_arch(char **cmdline_p)
> >  #endif
> >  #endif
> >  	x86_init.oem.banner();
> > +
> > +	mcheck_init();
> 
> I think you need
> 
> #ifdef CONFIG_X86_MCE
> ...
> #endif
> 
> here for cases where mcheck is config-disabled, no?
> 

Petkov, thanks for the review. Part of my patch is as below. Does this
resolve your concern?

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 161485d..41d8e42 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -120,8 +120,10 @@ extern int mce_disabled;
 extern int mce_p5_enabled;

 #ifdef CONFIG_X86_MCE
+int mcheck_init(void);
 void mcheck_cpu_init(struct cpuinfo_x86 *c);
 #else
+static int mcheck_init(void) { return 0; }
 static inline void mcheck_cpu_init(struct cpuinfo_x86 *c) {}
 #endif

Thanks
-Yong