From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: David John <davidjon@xenontk.org>
Cc: yakui.zhao@intel.com, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Disable SR when more than one pipe is enabled
Date: Wed, 27 Jan 2010 08:51:03 -0800 [thread overview]
Message-ID: <20100127085103.317e5ad8@jbarnes-piketon> (raw)
In-Reply-To: <1264585748-16929-1-BlackWidow-davidjon@xenontk.org>
On Wed, 27 Jan 2010 15:19:08 +0530
David John <davidjon@xenontk.org> wrote:
> Self Refresh should be disabled on dual plane configs.
> Otherwise, as the SR watermark is not calculated for
> such configs, switching to non VGA mode causes FIFO
> underrun and display flicker.
>
> This fixes Korg Bug # 14897.
>
> Signed-off-by: David John <davidjon@xenontk.org>
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 45da78e..46d7c0c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2519,6 +2519,10 @@ static void g4x_update_wm(struct drm_device *dev, int planea_clock,
> sr_entries = roundup(sr_entries / cacheline_size, 1);
> DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
> I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
> + } else {
> + /* Turn off self refresh if both pipes are enabled */
> + I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> + & ~FW_BLC_SELF_EN);
> }
>
> DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
> @@ -2562,6 +2566,10 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
> srwm = 1;
> srwm &= 0x3f;
> I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
> + } else {
> + /* Turn off self refresh if both pipes are enabled */
> + I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> + & ~FW_BLC_SELF_EN);
> }
>
> DRM_DEBUG_KMS("Setting FIFO watermarks - A: 8, B: 8, C: 8, SR %d\n",
> @@ -2630,6 +2638,10 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
> if (srwm < 0)
> srwm = 1;
> I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
> + } else {
> + /* Turn off self refresh if both pipes are enabled */
> + I915_WRITE(FW_BLC_SELF, I915_READ(FW_BLC_SELF)
> + & ~FW_BLC_SELF_EN);
> }
>
> DRM_DEBUG_KMS("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
>
Great! Looks like the docs were a bit misleading here. Disabling
self-refresh for dual plane configs is the safest thing to do.
Eric, please apply asap. Should probably go to stable as well.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
--
Jesse Barnes, Intel Open Source Technology Center
next prev parent reply other threads:[~2010-01-27 16:51 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-27 9:31 Fix For Korg Bug #14897 (GM45 Display Flicker) David John
2010-01-27 9:49 ` [PATCH] Disable SR when more than one pipe is enabled David John
2010-01-27 16:51 ` Jesse Barnes [this message]
2010-01-28 6:58 ` David John
2010-02-04 16:35 ` Eric Anholt
2010-01-27 13:52 ` Fix For Korg Bug #14897 (GM45 Display Flicker) ykzhao
2010-01-27 14:59 ` David John
2010-01-27 16:56 ` Jesse Barnes
2010-01-27 16:48 ` Jesse Barnes
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