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From: Bjorn Helgaas <bjorn.helgaas@hp.com>
To: Larry Finger <Larry.Finger@lwfinger.net>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>,
	Matthew Garrett <mjg59@srcf.ucam.org>,
	Tony Luck <tony.luck@intel.com>,
	linux-pci@vger.kernel.org, Peter Haight <peterh@sapros.com>,
	Gary Hade <garyhade@us.ibm.com>,
	linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
	Yinghai Lu <yinghai@kernel.org>, Ingo Molnar <mingo@elte.hu>,
	Linus Torvalds <torvalds@linux-foundation.org>
Subject: Re: [PATCH v1 0/7] PCI: try enabling "pci=use_crs" again
Date: Thu, 4 Feb 2010 15:55:26 -0700	[thread overview]
Message-ID: <201002041555.28365.bjorn.helgaas@hp.com> (raw)
In-Reply-To: <201002041055.58953.bjorn.helgaas@hp.com>

On Thursday 04 February 2010 10:55:57 am Bjorn Helgaas wrote:
> On Wednesday 03 February 2010 09:37:43 pm Larry Finger wrote:

> > In addition to the above, my system now boots with "pci=use_crs", unlike when I
> > filed the Bugzilla.
> 
> Huh.  From http://lkml.org/lkml/2009/6/24/11, I had assumed the main
> problem was that we overflowed the 16-entry bus resource table, but
> there must be more to it.
> 
> If you can build and boot the linux-next branch with my patches and
> collect the dmesg log, maybe it will have a clue.  You can boot without
> "pci=use_crs"; I don't think that will make any difference on your box.

Thanks for testing these and collecting the dmesg log
(http://bugzilla.kernel.org/attachment.cgi?id=24914).  That
log is from the PCI linux-next branch plus my patches, without
using "pci=use_crs".

On the current upstream (e.g., the c80d292 kernel you started with),
we have PCI_BUS_NUM_RESOURCES == 16.  Your _CRS returns 17 windows
(the "pci_root PNP0A08:00 host bridge window" lines), so when you
boot with "pci=use_crs", we should be discarding the last window,
which is an important one:

  pci_root PNP0A08:00: host bridge window [mem 0xc0000000-0xfebfffff]

Can you collect the dmesg log from the c80d292 kernel with "pci=use_crs"?
I'm sorry to trouble you for this, but it still looks to me like that
should fail, so I'd really like to understand why it's working.

Bjorn

      parent reply	other threads:[~2010-02-04 22:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-02-03 23:38 Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 1/7] x86/PCI: remove IOH range fetching Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 2/7] PCI: break out primary/secondary/subordinate for readability Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 3/7] PCI: split up pci_read_bridge_bases() Bjorn Helgaas
2010-02-08 19:59   ` Jesse Barnes
2010-02-03 23:39 ` [PATCH v1 4/7] PCI: read bridge windows before filling in subtractive decode resources Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 5/7] PCI: replace bus resource table with a list Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 6/7] x86/PCI: use host bridge _CRS info by default on 2010 and newer machines Bjorn Helgaas
2010-02-03 23:39 ` [PATCH v1 7/7] PCI: reference bridge window resources explicitly Bjorn Helgaas
2010-02-04  0:04 ` [PATCH v1 0/7] PCI: try enabling "pci=use_crs" again Linus Torvalds
2010-02-04  4:37 ` Larry Finger
2010-02-04 17:55   ` Bjorn Helgaas
2010-02-04 22:36     ` Larry Finger
2010-02-04 22:55     ` Bjorn Helgaas [this message]

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