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Date: Sun, 21 Feb 2010 14:09:38 +0000
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: "H. Peter Anvin" <hpa@zytor.com>
Cc: "Maciej W. Rozycki" <macro@linux-mips.org>,
       Suresh Siddha <suresh.b.siddha@intel.com>,
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Subject: Re: [patch 2/2] x86, irq: use 0x20 for the IRQ_MOVE_CLEANUP_VECTOR
 instead of 0x1f
Message-ID: <20100221140938.7aaab70d@lxorguk.ukuu.org.uk>
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References: <20100114002118.436172066@sbs-t61.sc.intel.com>
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	<4B5C00EB.3000208@zytor.com>
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> Either way, this doesn't exactly sound too bad.  A bigger question is if
> we want to do this globally or end up having different vector
> assignments for these oddball CPUs.  Testing it, too, will be almost
> impossible...

If you panic it won't get tested. If its done (even as 'experimental' then
it'll either get tested or not matter). They also have relatively few IRQ
sources by modern standards so there isn't a lot to map.

The bigger problem with the old processors is that some Pentium era SMP
boards actually get material numbers of repeated interrupts where one IPI
arrives twice on another CPU. That's something present in a lot of the
later chips (pre P4 I believe but don't quote me on that) but very
unusual to observe except on a few specific boards (eg the BP6))


Alan