From: Matthew Garrett <mjg59@srcf.ucam.org>
To: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jonathan Corbet <corbet@lwn.net>,
mgross@linux.intel.com, aili@codeaurora.org,
dwalker@codeaurora.org, tiwai@suse.de, bruce.w.allan@intel.com,
davidb@quicinc.com, mcgrof@gmail.com, pavel@ucw.cz,
linux-pm <linux-pm@lists.linux-foundation.org>,
lkml <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH]PM QOS refresh against next-20100430
Date: Mon, 3 May 2010 22:39:19 +0100 [thread overview]
Message-ID: <20100503213919.GA18910@srcf.ucam.org> (raw)
In-Reply-To: <87tyqo537l.fsf@deeprootsystems.com>
On Mon, May 03, 2010 at 10:01:50AM -0700, Kevin Hilman wrote:
> Jonathan Corbet <corbet@lwn.net> writes:
> > Well, shallow could mean that the state lacks the CPUIDLE_FLAG_DEEP
> > flag; that should be relatively portable. In any case, it seems
> > more so than "if I put in a 55us latency requirement, I'll stay out
> > of C3".
>
> I guess it depends on your goal. Do you just want to stay out of C3
> on your current platform? or do you want to stay out of any low-power
> state (on any platform) where you'll have a latency of > 55 usecs?
I'd say that one plausible requirement is "DMA works", with another
being "all interrupts work" as distinguished from "wakeup interrupts
work".
--
Matthew Garrett | mjg59@srcf.ucam.org
next prev parent reply other threads:[~2010-05-03 21:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-30 21:20 mark gross
2010-04-30 22:13 ` Rafael J. Wysocki
2010-04-30 23:05 ` mark gross
2010-04-30 23:08 ` Rafael J. Wysocki
2010-05-04 14:30 ` mark gross
2010-05-05 23:59 ` Rafael J. Wysocki
2010-05-03 16:33 ` Jonathan Corbet
2010-05-03 16:40 ` Kevin Hilman
2010-05-03 16:42 ` Jonathan Corbet
2010-05-03 17:01 ` Kevin Hilman
2010-05-03 17:10 ` Jonathan Corbet
2010-05-03 21:39 ` Matthew Garrett [this message]
2010-05-04 4:16 ` Pavel Machek
2010-05-04 4:41 ` [linux-pm] " mark gross
-- strict thread matches above, loose matches on Subject: below --
2010-04-30 21:17 mark gross
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