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From: Bjorn Helgaas <bjorn.helgaas@hp.com>
To: Jacob Pan <jacob.jun.pan@linux.intel.com>
Cc: LKML <linux-kernel@vger.kernel.org>,
	"H. Peter Anvin" <hpa@zytor.com>, Ingo Molnar <mingo@elte.hu>,
	Thomas Gleixner <tglx@linutronix.de>,
	Alan Cox <alan@linux.intel.com>,
	Arjan van de Ven <arjan@linux.intel.com>
Subject: Re: [PATCH 1/8] x86/mrst/pci: return 0 for non-present pci bars
Date: Mon, 17 May 2010 10:58:06 -0600	[thread overview]
Message-ID: <201005171058.07020.bjorn.helgaas@hp.com> (raw)
In-Reply-To: <1273873281-17489-2-git-send-email-jacob.jun.pan@linux.intel.com>

On Friday, May 14, 2010 03:41:14 pm Jacob Pan wrote:
> Moorestown PCI code has special handling of devices with fixed BARs. In
> case of BAR sizing writes, we need to update the fake PCI MMCFG space with real
> size decode value.
> 
> When a BAR is not present, we need to return 0 instead of ~0. ~0 will be
> treated as device error per bugzilla 12006.

It would be more convenient if you included the URL,
https://bugzilla.kernel.org/show_bug.cgi?id=12006,
rather than just the bugzilla number.

You probably noticed already, but we reverted the patch I
proposed in 12006 because it was too aggressive, so you may
not need this patch for that reason.

Per 6.2.5.1 in the PCI 3.0 spec, "unimplemented Base Address
registers are hardwired to zero," so it would make sense to me
to follow that, but your patch affects the *write* path, not
the read path, so I don't know how it's related to what
__pci_read_base() will see when it reads the BAR.

Bjorn

> Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  arch/x86/pci/mrst.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/x86/pci/mrst.c b/arch/x86/pci/mrst.c
> index 8bf2fcb..d5c7aef 100644
> --- a/arch/x86/pci/mrst.c
> +++ b/arch/x86/pci/mrst.c
> @@ -109,7 +109,7 @@ static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn,
>  			decode++;
>  			decode = ~(decode - 1);
>  		} else {
> -			decode = ~0;
> +			decode = 0;
>  		}
>  
>  		/*
> 

  parent reply	other threads:[~2010-05-17 16:58 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-05-14 21:41 [PATCH 0/8] v2 Moorestown core patches for 35 merge window Jacob Pan
2010-05-14 21:41 ` [PATCH 1/8] x86/mrst/pci: return 0 for non-present pci bars Jacob Pan
2010-05-16 22:35   ` Thomas Gleixner
2010-05-17  6:33   ` [tip:x86/mrst] x86, mrst, pci: " tip-bot for Jacob Pan
2010-05-17 16:58   ` Bjorn Helgaas [this message]
2010-05-17 17:04     ` [PATCH 1/8] x86/mrst/pci: " H. Peter Anvin
2010-05-14 21:41 ` [PATCH 2/8] x86/mrst: add cpu type detection for Medfield Jacob Pan
2010-05-16 22:40   ` Thomas Gleixner
2010-05-17 16:07     ` jacob pan
2010-05-14 21:41 ` [PATCH 3/8] x86/mrst: add more timer options to include Medfield Jacob Pan
2010-05-16 22:51   ` Thomas Gleixner
2010-05-14 21:41 ` [PATCH 4/8] x86/apbt: support more timer configurations on mrst Jacob Pan
2010-05-16 22:57   ` Thomas Gleixner
2010-05-14 21:41 ` [PATCH 5/8] x86/platform: add a wallclock_init func to x86_platforms ops Jacob Pan
2010-05-16 22:43   ` Thomas Gleixner
2010-05-14 21:41 ` [PATCH 6/8] x86/mrst: add vrtc driver which serves as a wall clock device Jacob Pan
2010-05-16 22:44   ` Thomas Gleixner
2010-05-14 21:41 ` [PATCH 7/8] x86/mrst: add nop functions to x86_init mpparse functions Jacob Pan
2010-05-16 22:44   ` Thomas Gleixner
2010-05-17  6:34   ` [tip:x86/mrst] x86, mrst: " tip-bot for Jacob Pan
2010-05-14 21:41 ` [PATCH 8/8] input: do not select i8042 for x86 mid Jacob Pan
2010-05-16 22:48   ` Thomas Gleixner
2010-05-17  5:50     ` H. Peter Anvin
2010-05-17 19:44     ` jacob pan

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