From: Henrique de Moraes Holschuh <hmh@hmh.eng.br>
To: Burt Triplett <burt@pbjtriplett.org>
Cc: linux-kernel@vger.kernel.org
Subject: Re: BITS handling of CPU microcode updates
Date: Thu, 24 Mar 2011 21:57:16 -0300 [thread overview]
Message-ID: <20110325005716.GA4535@khazad-dum.debian.net> (raw)
In-Reply-To: <4D8BAF4F.30609@pbjtriplett.org>
On Thu, 24 Mar 2011, Burt Triplett wrote:
> Out of curiosity, which other discrepancies did you encounter?
That was a false alarm. We use sync_core() instead of directly calling
CPUID(1), which right now is about the same, just more obfuscated and
complicated depending on some config options. Well, as long as
sync_core() doesn't change in the future.
There are also SPARSE warnings in the driver, but the code itself is
correct.
> Also, please CC me on the patch, and I'll review the changes.
I will post it in a few minutes.
--
"One disk to rule them all, One disk to find them. One disk to bring
them all and in the darkness grind them. In the Land of Redmond
where the shadows lie." -- The Silicon Valley Tarot
Henrique Holschuh
next prev parent reply other threads:[~2011-03-25 0:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-02-24 5:36 [announce] Intel BIOS Implementation Test Suite (BITS) Burt Triplett
2011-03-12 2:30 ` BITS handling of CPU microcode updates Henrique de Moraes Holschuh
2011-03-21 23:44 ` Burt Triplett
2011-03-24 0:14 ` Henrique de Moraes Holschuh
2011-03-24 20:53 ` Burt Triplett
2011-03-25 0:57 ` Henrique de Moraes Holschuh [this message]
2011-03-24 21:46 ` Andi Kleen
2011-03-25 7:05 ` Burt Triplett
2011-03-25 2:09 ` x86/microcode: intel: correctly handle negative revisions Henrique de Moraes Holschuh
2011-03-25 7:14 ` Burt Triplett
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