Re: advice sought: practicality of SMP cache coherency implemented in assembler (and a hardware detect line)

[Alan Cox <alan@lxorguk.ukuu.org.uk>]

>  ok - well, having thought about this a little bit (in a non-detailed
> high-level way) i was sort-of hoping, as alan hinted at, to still do
> SMP, even if it's slow, for userspace.   the primary thing to prevent
> from happening is to have kernelspace data structures from
> conflicting.
> 
>  i found kerrigan, btw, spoke to the people on it: louis agreed that
> the whole idea was mad as hell and was therefore actually very
> interesting to attempt :)
> 
>  as a first approximation i'm absolutely happy for existing pthreads
> applications to be forced to run on the same core.

The underlying problem across a cluster of nodes can be handled
transparently. MOSIX solved that problem a very long time ago using DSM
(distributed shared memory). It's not pretty, it requires a lot of tuning
to make it fly but they did it over comparatively slow interconnects.

Alan