From: Markus Trippelsdorf <markus@trippelsdorf.de>
To: Dave Airlie <airlied@redhat.com>
Cc: "Marek Olšák" <maraeo@gmail.com>, linux-kernel@vger.kernel.org
Subject: Re: Latest merge of 'drm-radeon-fixes' breaks my setup
Date: Wed, 8 Jun 2011 07:43:54 +0200 [thread overview]
Message-ID: <20110608054354.GA1717@x4.trippels.de> (raw)
In-Reply-To: <20110608054002.GA1717@x4.trippels.de>
On 2011.06.08 at 07:40 +0200, Markus Trippelsdorf wrote:
> The merge of the 'drm-radeon' branch by Linus yesterday breaks my setup
> (RS780). The mouse cursor is just a black block suddenly and I see an
> endless stream of:
> radeon 0000:01:05.0: r600_check_texture_resource:1338 texture invalid format 26
> [drm:radeon_cs_ioctl] *ERROR* Invalid command stream !
>
> A quick git-bisect points to:
> commit fe6f0bd03d697835e76dd18d232ba476c65b8282
> Author: Marek Olšák <maraeo@gmail.com>
> Date: Sat May 7 01:09:57 2011 +0200
>
> drm/radeon/kms: add missing Evergreen texture formats to the CS parser
>
> Reverting the commit solves the issue.
The following patch is enough to resolve the problem:
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 909bda8..cbcc136 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -71,14 +71,14 @@ struct r600_cs_track {
u64 db_bo_mc;
};
-#define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc, CHIP_R600 }
-#define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc, CHIP_R600 }
-#define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0, CHIP_R600 }
-#define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc, CHIP_R600 }
-#define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0, CHIP_R600 }
-#define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc, CHIP_R600 }
-#define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0, CHIP_R600 }
-#define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16,vc, CHIP_R600 }
+#define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc }
+#define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc }
+#define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0 }
+#define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc }
+#define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0 }
+#define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc }
+#define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0 }
+#define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16,vc }
struct gpu_formats {
unsigned blockwidth;
--
Markus
next prev parent reply other threads:[~2011-06-08 5:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-08 5:40 Markus Trippelsdorf
2011-06-08 5:43 ` Markus Trippelsdorf [this message]
2011-06-08 10:09 ` Dave Airlie
2011-06-08 10:26 ` Markus Trippelsdorf
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