From: Samuel Thibault <samuel.thibault@ens-lyon.org>
To: mingo@elte.hu, peterz@infradead.org
Cc: linux-kernel@vger.kernel.org
Subject: "Cache" sched domains
Date: Thu, 16 Jun 2011 14:11:47 +0200 [thread overview]
Message-ID: <20110616121147.GA4644@const.bordeaux.inria.fr> (raw)
Hello,
We have an x86 machine whose sockets look like this in hwloc:
┌──────────────────────────────────────────────────────────────────┐
│Socket P#1 │
│┌────────────────────────────────────────────────────────────────┐│
││L3 (16MB) ││
│└────────────────────────────────────────────────────────────────┘│
│┌────────────────────┐┌────────────────────┐┌────────────────────┐│
││L2 (3072KB) ││L2 (3072KB) ││L2 (3072KB) ││
│└────────────────────┘└────────────────────┘└────────────────────┘│
│┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐│
││L1 (32KB)││L1 (32KB)││L1 (32KB)││L1 (32KB)││L1 (32KB)││L1 (32KB)││
│└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘│
│┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐┌─────────┐│
││Core P#0 ││Core P#1 ││Core P#2 ││Core P#3 ││Core P#4 ││Core P#5 ││
││┌───────┐││┌───────┐││┌───────┐││┌───────┐││┌───────┐││┌───────┐││
│││PU P#0 ││││PU P#4 ││││PU P#8 ││││PU P#12││││PU P#16││││PU P#20│││
││└───────┘││└───────┘││└───────┘││└───────┘││└───────┘││└───────┘││
│└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘└─────────┘│
└──────────────────────────────────────────────────────────────────┘
However, Linux does not build sched domains for the pairs of cores
which share an L2 cache. On s390, IBM added sched domains for books,
that is, sets of cores which share an L2 cache. The support should
probably be added in a generic way for all archs thanks to generic cache
information.
Samuel
next reply other threads:[~2011-06-16 12:11 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-16 12:11 Samuel Thibault [this message]
2011-06-16 12:27 ` Peter Zijlstra
2011-06-16 13:20 ` Samuel Thibault
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