From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754367Ab1GFX5U (ORCPT ); Wed, 6 Jul 2011 19:57:20 -0400 Received: from mail-qy0-f181.google.com ([209.85.216.181]:40916 "EHLO mail-qy0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753353Ab1GFX5T (ORCPT ); Wed, 6 Jul 2011 19:57:19 -0400 Date: Wed, 6 Jul 2011 19:57:13 -0400 From: Jay Estabrook To: airlied@linux.ie, linux-kernel , linux-alpha , dri-devel Cc: Matt Turner , Richard Henderson , Ivan Kokshaysky , Jay Estabrook Subject: [PATCH 3/3 REPOST #2] alpha, drm: Add Alpha support to Radeon DRM code Message-ID: <20110706195713.48fe25fe.jay.estabrook_gmail.com@gmail.com> X-Mailer: Claws Mail 3.7.8 (GTK+ 2.22.1; alpha-unknown-linux-gnu) Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Alpha needs to have available the system bus address for the Radeon's local memory, so that it can be used in ttm_bo_vm_fault(), when building the PTEs for accessing that VRAM. So, we make bus.addr hold the ioremap() return, and then we can modify bus.base appropriately for use during page fault processing. Signed-off-by: Jay Estabrook --- drivers/gpu/drm/radeon/radeon_ttm.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff -Naurp a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c --- a/drivers/gpu/drm/radeon/radeon_ttm.c 2011-04-26 23:48:50.000000000 -0400 +++ b/drivers/gpu/drm/radeon/radeon_ttm.c 2011-05-03 18:24:27.000000000 -0400 @@ -450,6 +450,29 @@ static int radeon_ttm_io_mem_reserve(str return -EINVAL; mem->bus.base = rdev->mc.aper_base; mem->bus.is_iomem = true; +#ifdef __alpha__ + /* + * Alpha: use bus.addr to hold the ioremap() return, + * so we can modify bus.base below. + */ + if (mem->placement & TTM_PL_FLAG_WC) + mem->bus.addr = + ioremap_wc(mem->bus.base + mem->bus.offset, + mem->bus.size); + else + mem->bus.addr = + ioremap_nocache(mem->bus.base + mem->bus.offset, + mem->bus.size); + + /* + * Alpha: Use just the bus offset plus + * the hose/domain memory base for bus.base. + * It then can be used to build PTEs for VRAM + * access, as done in ttm_bo_vm_fault(). + */ + mem->bus.base = (mem->bus.base & 0x0ffffffffUL) + + rdev->ddev->hose->dense_mem_base; +#endif break; default: return -EINVAL;