From: Robert Richter <robert.richter@amd.com>
To: Michael Cree <mcree@orcon.net.nz>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@elte.hu>,
Arnaldo Carvalho de Melo <acme@redhat.com>,
LKML <linux-kernel@vger.kernel.org>,
Lin Ming <ming.m.lin@intel.com>
Subject: Re: [PATCH 6/7] perf, x86: Example code for AMD IBS
Date: Wed, 3 Aug 2011 19:56:38 +0200 [thread overview]
Message-ID: <20110803175637.GN11795@erda.amd.com> (raw)
In-Reply-To: <4E39065C.6020801@orcon.net.nz>
On 03.08.11 04:27:08, Michael Cree wrote:
> On 02/08/11 22:37, Peter Zijlstra wrote:
> > Possibly, but having just looked at the example again I don't really see
> > it doing anything perf-record doesn't already do, so why does it deserve
> > to live at all?
I also got it running with perf-record with Lin's patch
perf tool: Parse general/raw events from sysfs
with no other changes using:
perf record -R -e ibs_fetch:r0 -a -c 10000 <command>
What is missing here is a parser for the IBS sampling data that is
very specific, which would be the perf-ibs-annotate tool you
recommended.
> > Initially I thought it was a record+report like example, some code
> > interpreting the 'mess' that comes out of IBS would be most appreciated
> > and I think we can even ship that as perf-ibs-report/perf-ibs-annotate
> > or so (and if its still remotely similar to its Alpha precursor that
> > might make the Alpha folks happy too).
Yes, the example I wrote could use perf-record as backend. The parser
for IBS could be part of perf-record, if we encode the pmu name
(ibs_op/ibs_fetch) in perf.data. Then we don't neeed a special tool
for IBS anymore.
> Sure would be nice if the infrastructure to support ProfileMe mode
> appeared in the perf. events subsystem. I am not going to go full out
> to implement all the support needed for it because there are too few
> users on Alpha to justify the effort. But if we could score an
> implementation of ProfileMe mode with minimal effort on the back of an
> AMD implementation that would make us happy.
ProfileMe looks similar to IBS, so the above would fit there too.
-Robert
--
Advanced Micro Devices, Inc.
Operating System Research Center
next prev parent reply other threads:[~2011-08-03 18:03 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-28 13:46 [PATCH 0/7] perf, x86: Implement " Robert Richter
2011-07-28 13:46 ` [PATCH 1/7] perf, x86: share IBS macros between perf and oprofile Robert Richter
2011-07-28 13:46 ` [PATCH 2/7] perf, x86: Implement IBS initialization Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:27 ` Robert Richter
2011-08-02 11:49 ` Peter Zijlstra
2011-08-12 17:49 ` Robert Richter
2011-07-28 13:46 ` [PATCH 3/7] perf, x86: Implement IBS event configuration Robert Richter
2011-08-02 11:35 ` Peter Zijlstra
2011-08-12 19:51 ` Robert Richter
2011-07-28 13:46 ` [PATCH 4/7] perf, x86: Implement IBS interrupt handler Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:32 ` Robert Richter
2011-08-01 15:21 ` Peter Zijlstra
2011-08-01 16:38 ` Don Zickus
2011-08-05 9:55 ` Ingo Molnar
2011-08-05 13:47 ` Don Zickus
2011-08-02 11:43 ` Peter Zijlstra
2011-08-12 18:07 ` Robert Richter
2011-07-28 13:46 ` [PATCH 5/7] perf, x86: Implement IBS pmu control ops Robert Richter
2011-07-28 13:46 ` [PATCH 6/7] perf, x86: Example code for AMD IBS Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-08-01 5:50 ` Robert Richter
2011-08-02 10:37 ` Peter Zijlstra
2011-08-03 8:27 ` Michael Cree
2011-08-03 17:56 ` Robert Richter [this message]
2011-07-28 13:46 ` [PATCH 7/7] perf, x86: Implement 64 bit counter support for IBS Robert Richter
2011-07-29 16:58 ` Peter Zijlstra
2011-07-29 17:02 ` Peter Zijlstra
2011-08-01 5:55 ` Robert Richter
2011-07-29 17:01 ` Peter Zijlstra
2011-08-01 6:13 ` Robert Richter
2011-08-02 11:37 ` Peter Zijlstra
2011-08-12 18:11 ` Robert Richter
2011-07-29 17:07 ` [PATCH 0/7] perf, x86: Implement AMD IBS Peter Zijlstra
2011-08-01 5:21 ` Robert Richter
2011-08-02 11:29 ` Peter Zijlstra
2011-08-12 19:43 ` Robert Richter
2011-08-16 21:05 ` Robert Richter
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