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From: Suresh Siddha <suresh.b.siddha@intel.com>
To: mingo@elte.hu, tglx@linutronix.de, hpa@zytor.com, dwmw2@infradead.org
Cc: yinghai@kernel.org, youquan.song@intel.com, joerg.roedel@amd.com,
	tony.luck@intel.com, linux-kernel@vger.kernel.org,
	Suresh Siddha <suresh.b.siddha@intel.com>
Subject: [patch 6/8] x86, msi, intr-remap: use the ioapic set affinity routine
Date: Tue, 23 Aug 2011 17:05:23 -0700	[thread overview]
Message-ID: <20110824001456.452760446@sbsiddha-desk.sc.intel.com> (raw)
In-Reply-To: <20110824000517.710353624@sbsiddha-desk.sc.intel.com>

[-- Attachment #1: remove_ir_msi_set_affinity.patch --]
[-- Type: text/plain, Size: 3316 bytes --]

IRQ set affinity routine is same for the IO-APIC IRQ's aswell as the MSI
IRQ's in the presence of interrupt-remapping. This is because we modify
the interrupt-remapping table entry and doesn't touch the IO-APIC RTE or the
MSI entry.

So remove the ir_msi_set_affinity() and re-use the ir_ioapic_set_affinity()

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
---
 arch/x86/kernel/apic/io_apic.c |   54 +++++++++--------------------------------
 1 file changed, 12 insertions(+), 42 deletions(-)

Index: tree/arch/x86/kernel/apic/io_apic.c
===================================================================
--- tree.orig/arch/x86/kernel/apic/io_apic.c
+++ tree/arch/x86/kernel/apic/io_apic.c
@@ -2267,6 +2267,9 @@ ioapic_set_affinity(struct irq_data *dat
  * updated vector information), by using a virtual vector (io-apic pin number).
  * Real vector that is used for interrupting cpu will be coming from
  * the interrupt-remapping table entry.
+ *
+ * As the migration is a simple atomic update of IRTE, the same mechanism
+ * is used to migrate MSI irq's in the presence of interrupt-remapping.
  */
 static int
 ir_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
@@ -2291,10 +2294,16 @@ ir_ioapic_set_affinity(struct irq_data *
 	irte.dest_id = IRTE_DEST(dest);
 
 	/*
-	 * Modified the IRTE and flushes the Interrupt entry cache.
+	 * Atomically updates the IRTE with the new destination, vector
+	 * and flushes the interrupt entry cache.
 	 */
 	modify_irte(irq, &irte);
 
+	/*
+	 * After this point, all the interrupts will start arriving
+	 * at the new destination. So, time to cleanup the previous
+	 * vector allocation.
+	 */
 	if (cfg->move_in_progress)
 		send_cleanup_vector(cfg);
 
@@ -3144,45 +3153,6 @@ msi_set_affinity(struct irq_data *data, 
 
 	return 0;
 }
-#ifdef CONFIG_INTR_REMAP
-/*
- * Migrate the MSI irq to another cpumask. This migration is
- * done in the process context using interrupt-remapping hardware.
- */
-static int
-ir_msi_set_affinity(struct irq_data *data, const struct cpumask *mask,
-		    bool force)
-{
-	struct irq_cfg *cfg = data->chip_data;
-	unsigned int dest, irq = data->irq;
-	struct irte irte;
-
-	if (get_irte(irq, &irte))
-		return -1;
-
-	if (__ioapic_set_affinity(data, mask, &dest))
-		return -1;
-
-	irte.vector = cfg->vector;
-	irte.dest_id = IRTE_DEST(dest);
-
-	/*
-	 * atomically update the IRTE with the new destination and vector.
-	 */
-	modify_irte(irq, &irte);
-
-	/*
-	 * After this point, all the interrupts will start arriving
-	 * at the new destination. So, time to cleanup the previous
-	 * vector allocation.
-	 */
-	if (cfg->move_in_progress)
-		send_cleanup_vector(cfg);
-
-	return 0;
-}
-
-#endif
 #endif /* CONFIG_SMP */
 
 /*
@@ -3207,7 +3177,7 @@ static struct irq_chip msi_ir_chip = {
 #ifdef CONFIG_INTR_REMAP
 	.irq_ack		= ir_ack_apic_edge,
 #ifdef CONFIG_SMP
-	.irq_set_affinity	= ir_msi_set_affinity,
+	.irq_set_affinity	= ir_ioapic_set_affinity,
 #endif
 #endif
 	.irq_retrigger		= ioapic_retrigger_irq,
@@ -3416,7 +3386,7 @@ static struct irq_chip ir_hpet_msi_type 
 #ifdef CONFIG_INTR_REMAP
 	.irq_ack		= ir_ack_apic_edge,
 #ifdef CONFIG_SMP
-	.irq_set_affinity	= ir_msi_set_affinity,
+	.irq_set_affinity	= ir_ioapic_set_affinity,
 #endif
 #endif
 	.irq_retrigger		= ioapic_retrigger_irq,



  parent reply	other threads:[~2011-08-24  0:50 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-08-24  0:05 [patch 0/8] intel iommu, irq-remap, x2apic bug fixes and cleanups Suresh Siddha
2011-08-24  0:05 ` [patch 1/8] x86, x2apic: enable the bios request for x2apic optout Suresh Siddha
2011-08-24  0:05 ` [patch 2/8] intr_remap: call dmar_dev_scope_init() explicitly Suresh Siddha
2011-08-24  0:05 ` [patch 3/8] iommu: move IOMMU specific code to intel-iommu.c Suresh Siddha
2011-08-24  9:27   ` Roedel, Joerg
2011-08-24 18:31     ` Suresh Siddha
2011-08-25 17:05       ` Roedel, Joerg
2011-08-24  0:05 ` [patch 4/8] iommu: no need to set dmar_disabled in check_zero_address() Suresh Siddha
2011-08-24  0:05 ` [patch 5/8] iommu: cleanup ifdefs in detect_intel_iommu() Suresh Siddha
2011-08-24  0:05 ` Suresh Siddha [this message]
2011-08-24  6:57   ` [patch 6/8] x86, msi, intr-remap: use the ioapic set affinity routine Yinghai Lu
2011-08-24  0:05 ` [patch 7/8] x86, ioapic: define irq_remap_modify_chip_defaults() Suresh Siddha
2011-08-24  0:05 ` [patch 8/8] iommu: rename the DMAR and INTR_REMAP config options Suresh Siddha
2011-08-24  6:47   ` Yinghai Lu
2011-08-24  8:28     ` Roedel, Joerg
2011-08-24 18:25       ` Suresh Siddha

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