From: Will Deacon <will.deacon@arm.com>
To: Oleg Strikov <OSTRIKOV@nvidia.com>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>,
"mingo@elte.hu" <mingo@elte.hu>,
William Cohen <wcohen@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Michael Cree <mcree@orcon.net.nz>,
Deng-Cheng Zhu <dengcheng.zhu@gmail.com>,
Anton Blanchard <anton@samba.org>,
Eric B Munson <emunson@mgebm.net>,
Heiko Carstens <heiko.carstens@de.ibm.com>,
Paul Mundt <lethal@linux-sh.org>,
"David S. Miller" <davem@davemloft.net>,
Richard Kuo <rkuo@codeaurora.org>,
Stephane Eranian <eranian@google.com>,
Arun Sharma <asharma@fb.com>, Vince Weaver <vince@deater.net>
Subject: Re: [RFC][PATCH 2/6] perf, arch: Rework perf_event_index()
Date: Tue, 22 Nov 2011 11:52:21 +0000 [thread overview]
Message-ID: <20111122115221.GL20518@mudshark.cambridge.arm.com> (raw)
In-Reply-To: <68B2676CBD57C643A577008EC1419ED1504663E239@DEMAIL01.nvidia.com>
On Tue, Nov 22, 2011 at 11:49:41AM +0000, Oleg Strikov wrote:
> > The user-readable clock will first appear in Cortex-A15, so the code for that still needs to hit mainline before I can look at doing this in perf.
>
> This could be very useful. I think that the cycles counter covers the 90% of all the in-app profiler needs.
Well, it's slightly different to the cycle counter in that it will continue
to count when the core is idle. The PMU cycle counter may stop when you
issue a WFI. The frequency of the clock is also unlikely to be the same as
the CPU clock.
Will
next prev parent reply other threads:[~2011-11-22 11:52 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-21 14:51 [RFC][PATCH 0/6] perf: x86 RDPMC and RDTSC support Peter Zijlstra
2011-11-21 14:51 ` [RFC][PATCH 1/6] perf: Update the mmap control page on mmap() Peter Zijlstra
2011-11-21 14:51 ` [RFC][PATCH 2/6] perf, arch: Rework perf_event_index() Peter Zijlstra
2011-11-21 16:22 ` Eric B Munson
2011-11-21 17:23 ` Will Deacon
2011-11-21 19:18 ` Peter Zijlstra
2011-11-21 20:31 ` Will Deacon
2011-11-21 20:35 ` Peter Zijlstra
2011-11-21 22:43 ` Will Deacon
2011-11-22 11:26 ` Peter Zijlstra
2011-11-22 11:47 ` Will Deacon
2011-11-22 11:49 ` Oleg Strikov
2011-11-22 11:52 ` Will Deacon [this message]
2011-11-22 11:56 ` Oleg Strikov
2011-11-22 12:00 ` Oleg Strikov
2011-11-22 12:14 ` Will Deacon
2011-11-22 12:25 ` Oleg Strikov
2011-11-22 11:51 ` Peter Zijlstra
2011-11-22 11:54 ` Will Deacon
2011-11-22 11:48 ` Oleg Strikov
2011-11-21 14:51 ` [RFC][PATCH 3/6] perf, x86: Implement userspace RDPMC Peter Zijlstra
2011-11-21 14:51 ` [RFC][PATCH 4/6] perf, x86: Provide means of disabling " Peter Zijlstra
2011-11-21 14:51 ` [RFC][PATCH 5/6] perf: Extend the mmap control page with time (TSC) fields Peter Zijlstra
2011-12-28 17:55 ` Stephane Eranian
2011-11-21 14:51 ` [RFC][PATCH 6/6] perf, tools: X86 RDPMC, RDTSC test Peter Zijlstra
2011-11-21 15:29 ` Stephane Eranian
2011-11-21 15:37 ` Peter Zijlstra
2011-11-21 16:59 ` Peter Zijlstra
2011-11-21 17:42 ` Stephane Eranian
2011-11-21 15:02 ` [RFC][PATCH 0/6] perf: x86 RDPMC and RDTSC support Vince Weaver
2011-11-21 16:05 ` William Cohen
2011-11-21 16:08 ` William Cohen
2011-12-02 19:26 ` Arun Sharma
2011-12-02 22:22 ` Stephane Eranian
2011-12-05 20:16 ` Arun Sharma
2011-12-05 23:17 ` Arun Sharma
2011-12-06 1:38 ` Stephane Eranian
2011-12-06 9:42 ` Peter Zijlstra
2011-12-06 21:53 ` Arun Sharma
2011-12-16 22:36 ` Vince Weaver
2011-12-21 12:58 ` Peter Zijlstra
2011-12-21 13:15 ` Ingo Molnar
2011-12-23 20:12 ` Vince Weaver
2011-12-21 15:04 ` Vince Weaver
2011-12-21 21:32 ` Vince Weaver
2011-12-21 21:41 ` Peter Zijlstra
2011-12-21 22:19 ` Vince Weaver
2011-12-21 22:32 ` Peter Zijlstra
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