From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933135Ab2AKOZY (ORCPT ); Wed, 11 Jan 2012 09:25:24 -0500 Received: from hqemgate04.nvidia.com ([216.228.121.35]:3589 "EHLO hqemgate04.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932786Ab2AKOZU (ORCPT ); Wed, 11 Jan 2012 09:25:20 -0500 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Wed, 11 Jan 2012 06:25:18 -0800 From: Hiroshi Doyu To: "linux@arm.linux.org.uk" CC: "linux-tegra@vger.kernel.org" , "linaro-mm-sig-bounces@lists.linaro.org" , "iommu@lists.linux-foundation.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Date: Wed, 11 Jan 2012 15:24:40 +0100 Subject: Re: [PATCH v3 0/2] ARM: IOMMU: tegra: Add iommu_ops for GART/SMMU driver Thread-Topic: [PATCH v3 0/2] ARM: IOMMU: tegra: Add iommu_ops for GART/SMMU driver Thread-Index: AczQbNX119GnLoLjSdWNg4Ji4xrFlQ== Message-ID: <20120111.162440.1854857348878391112.hdoyu@nvidia.com> References: <20120105125326.GT11810@n2100.arm.linux.org.uk><20120105.162930.604365154868332443.hdoyu@nvidia.com><20120105144631.GV11810@n2100.arm.linux.org.uk> In-Reply-To: <20120105144631.GV11810@n2100.arm.linux.org.uk> Accept-Language: en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-nvconfidentiality: public acceptlanguage: en-US Content-Type: multipart/mixed; boundary="_002_201201111624401854857348878391112hdoyunvidiacom_" MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --_002_201201111624401854857348878391112hdoyunvidiacom_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable From: Russell King - ARM Linux Subject: Re: [PATCH v3 0/2] ARM: IOMMU: tegra: Add iommu_ops for GART/SMMU = driver Date: Thu, 5 Jan 2012 15:46:31 +0100 Message-ID: <20120105144631.GV11810@n2100.arm.linux.org.uk> > On Thu, Jan 05, 2012 at 03:29:30PM +0100, Hiroshi Doyu wrote: > > Ok, the above function order should be as below? > >=20 > > page =3D alloc_page(GFP_KERNEL); > > cpu_addr =3D kmap(page); > > memset(cpu_addr, 0xa5, PAGE_SIZE); > > dma_addr =3D dma_map_page(dev, page, 0, PAGE_SIZE, DMA_TO_DEVICE); > > < expect GPU does something > > > dma_unmap_page(dev, dma_addr, PAGE_SIZE, DMA_TO_DEVICE); > > < CPU can access data here again> > > kunmap(cpu_addr); > > __free_page(page); >=20 > That should work, but it's not particularly nice to wrap kmap around > the DMA API. >=20 > Bear in mind that alloc_page(GFP_KERNEL) will always give you a lowmem > page. So, you might as well do: >=20 > page =3D alloc_page(GFP_KERNEL); > cpu_addr =3D page_address(page); > memset() > dma_addr =3D dma_map_single(dev, cpu_addr, PAGE_SIZE, DMA_TO_DEVICE); > < GPU access > > dma_unmap_single(dev, dma_ddr, PAGE_SIZE, DMA_TO_DEVICE); > < CPU access > > __free_page(page); >=20 > and this doesn't raise any issues with kmap vs DMA API. Attached the update one just in case that someone wants to use it for their= s. --_002_201201111624401854857348878391112hdoyunvidiacom_ Content-Type: text/x-patch; name="0001-NOT-FOR-MERGE-TEST-Simple-dma-iommu-mapping-API-TEST.patch" Content-Description: 0001-NOT-FOR-MERGE-TEST-Simple-dma-iommu-mapping-API-TEST.patch Content-Disposition: attachment; filename="0001-NOT-FOR-MERGE-TEST-Simple-dma-iommu-mapping-API-TEST.patch"; size=6451; creation-date="Wed, 11 Jan 2012 14:25:15 GMT"; modification-date="Wed, 11 Jan 2012 14:25:15 GMT" Content-Transfer-Encoding: base64 RnJvbSA3NmFlZmVhMWM3YWQwMDQ1OTAyOTVkYmU2M2MyN2YwYzZmNDgyZjdhIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQ0KRnJvbTogSGlyb3NoaSBET1lVIDxoZG95dUBudmlkaWEuY29tPg0KRGF0 ZTogVGh1LCAxNSBEZWMgMjAxMSAxMzoyNDoyNCArMDIwMA0KU3ViamVjdDogW1BBVENIIDEvMV0g W05PVC1GT1ItTUVSR0VdIFRFU1Q6IFNpbXBsZSBkbWEtaW9tbXUtbWFwcGluZyBBUEkgVEVTVA0K IG1vZHVsZQ0KDQpUaGlzIGlzIG5vdCBwb3N0ZWQgdG8gbWVyZ2UgYnV0IHRoaXMgaXMgbmVjZXNz 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