Re: [PATCH 3/4][RESEND] spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control

[Grant Likely <grant.likely@secretlab.ca>]

On Fri,  9 Dec 2011 13:13:28 +0900, Tomoya MORINAGA <tomoya.rohm@gmail.com> wrote:
> This patch supports a spi mode setup and bit order setup by IO control.
>     spi mode:     mode 0 to mode 3
>     bit order:    LSB first, MSB first
> 
> Signed-off-by: Tomoya MORINAGA <tomoya.rohm@gmail.com>

Applied, thanks.

g.

> ---
>  drivers/spi/spi-topcliff-pch.c |    1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/spi/spi-topcliff-pch.c b/drivers/spi/spi-topcliff-pch.c
> index 7339765..1864555 100644
> --- a/drivers/spi/spi-topcliff-pch.c
> +++ b/drivers/spi/spi-topcliff-pch.c
> @@ -1430,6 +1430,7 @@ static int __devinit pch_spi_pd_probe(struct platform_device *plat_dev)
>  	master->num_chipselect = PCH_MAX_CS;
>  	master->setup = pch_spi_setup;
>  	master->transfer = pch_spi_transfer;
> +	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
>  
>  	data->board_dat = board_dat;
>  	data->plat_dev = plat_dev;
> -- 
> 1.7.4.4
> 

-- 
Grant Likely, B.Sc, P.Eng.
Secret Lab Technologies,Ltd.