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To: Mai La <mla@apm.com>
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From: Wolfgang Denk <wd@denx.de>
Subject: Re: [PATCH 1/2] powerpc/44x: Fix PCI MSI support for Maui APM821xx SoC and Bluestone board
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Comments: In-reply-to Mai La <mla@apm.com>
   message dated "Mon, 12 Mar 2012 11:01:58 +0700."
Date: Mon, 12 Mar 2012 06:31:12 +0100
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Dear Mai La,

In message <1331524918-22515-1-git-send-email-mla@apm.com> you wrote:
> This patch consists of:
> - Enable PCI MSI as default for Bluestone board
> - Change definition of number of MSI interrupt as it depends on SoC
> - Fix returning ENODEV as finding MSI node
> - Fix MSI physical high and low address
> - Keep MSI data logically
> 
> Signed-off-by: Mai La <mla@apm.com>

This is an updated version of your patch of March 09, right -
http://article.gmane.org/gmane.linux.kernel/1264255  ??

If so, you should mark ot as patch V2 in the Subject:, and add a
description of what you changed.

> -	SDR0_WRITE(sdr_addr, (u64)res.start >> 32);	 /*HIGH addr */
> -	SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
> -
> +	mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start));	/*HIGH addr */
> +	mtdcri(SDR0, *sdr_addr + 1, lower_32_bits(res.start));	/* Low addr */
...
> +	msi->msi_addr_hi = (u32)(msi_phys >> 32);
> +	msi->msi_addr_lo = (u32)(msi_phys & 0xffffffff);

Is there any reason for not using upper_32_bits() / lower_32_bits()
consistently?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
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