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Date: Tue, 13 Mar 2012 11:38:29 +0100
From: Sascha Hauer <s.hauer@pengutronix.de>
To: Matt Sealey <matt@genesi-usa.com>
Cc: Mike Turquette <mturquette@linaro.org>,
        Russell King <linux@arm.linux.org.uk>, Andrew Lunn <andrew@lunn.ch>,
        linaro-dev@lists.linaro.org, Saravana Kannan <skannan@codeaurora.org>,
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        Mark Brown <broonie@opensource.wolfsonmicro.com>,
        Stephen Boyd <sboyd@codeaurora.org>, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 3/3] clk: basic clock hardware types
Message-ID: <20120313103829.GR3852@pengutronix.de>
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On Mon, Mar 12, 2012 at 10:50:09PM -0500, Matt Sealey wrote:
> Hi Mike,
> 
> Can I suggest/we discuss that we support fractional (i.e. represented
> by fixed point value with integer and fractional part) dividers in the
> common divider clock case, simplistically just adding a divider
> fractional width and shifting all the calculations by it (and fixing
> the "maxdiv" calculation as in a fractional case width of the divider
> area in the register is not an indicator of the actual maximum
> divider)? (I guess for the standard integer divider case, it would be
> continually shifting by 0 which might make the code a bit bigger, I
> don't think that would truly be a concern though?)

I have patches for this, see

git://git.pengutronix.de/git/imx/linux-2.6.git imx/work/imx-clkv6

Sascha

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