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From: "Rafael J. Wysocki" <rjw@sisk.pl>
To: huang ying <huang.ying.caritas@gmail.com>
Subject: Re: [RFC PATCH] PCIe: Add PCIe runtime D3cold support
Date: Tue, 17 Apr 2012 22:43:39 +0200
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Cc: "Yan, Zheng" <zheng.z.yan@intel.com>, bhelgaas@google.com,
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On Tuesday, April 17, 2012, huang ying wrote:
> On Tue, Apr 17, 2012 at 10:12 AM, Yan, Zheng <zheng.z.yan@intel.com> wrote:
> > On 04/17/2012 01:07 AM, Rafael J. Wysocki wrote:
> >
> >> BTW, can you please explain to me what the #WAKE signal is and how it is
> >> different from PME#?
> >
> > #WAKE signal is triggered by a pin connected to the root complex or other
> > motherboard logic. PME# is triggered by PME message sent to the port.
> 
> PME# is a PCI pin, while WAKE# is a PCI Express pin.  In PCI Express,
> there is no PME#, PME is delivered between end point device and root
> port or root complex event collector via PME message, and the PME
> message will trigger IRQ on root port or root complex event collector.
>  WAKE# is not used for PCI Express D1, D2 and D3hot, it is just used
> by D3cold.  When remote wakeup detected by end point device, it will
> assert WAKE# to notify power controller (implemented via ACPI on some
> platform), then power controller will turn on power for main link,
> after link goes back to L0, PME message will be sent to root port or
> root complex event collector by end point device.

OK

So do I understand correctly that the WAKE# signal here is the one described
in Section 5.3.3.2 Link Wakeup of PCI Express Base spec. 2.0?

So what happens is that it triggers a GPE and that GPE has a _Lxx method
associated with it, I suppose.  Is that correct?

Rafael