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From: Jean Delvare <khali@linux-fr.org>
To: Daniel Kurtz <djkurtz@chromium.org>
Cc: Ben Dooks <ben-linux@fluff.org>,
	Wolfram Sang <w.sang@pengutronix.de>,
	Seth Heasley <seth.heasley@intel.com>,
	Olof Johansson <olof@lixom.net>,
	Benson Leung <bleung@chromium.org>,
	linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/8 v3] i2c: i801: rename some SMBHSTCNT bit constants
Date: Wed, 27 Jun 2012 19:01:03 +0200	[thread overview]
Message-ID: <20120627190103.29245704@endymion.delvare> (raw)
In-Reply-To: <1340805255-8041-6-git-send-email-djkurtz@chromium.org>

On Wed, 27 Jun 2012 21:54:12 +0800, Daniel Kurtz wrote:
> Rename the SMBHSTCNT register bit access constants to match the style of
> other register bits.
> 
> Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
> ---
>  drivers/i2c/busses/i2c-i801.c |   21 +++++++++++----------
>  1 files changed, 11 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index ba56b74..c57bb0c 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -102,9 +102,6 @@
>  #define SMBAUXCTL_CRC		1
>  #define SMBAUXCTL_E32B		2
>  
> -/* kill bit for SMBHSTCNT */
> -#define SMBHSTCNT_KILL		2
> -
>  /* Other settings */
>  #define MAX_RETRIES		400
>  #define ENABLE_INT9		0	/* set to 0x01 to enable - untested */
> @@ -117,9 +114,13 @@
>  #define I801_PROC_CALL		0x10	/* unimplemented */
>  #define I801_BLOCK_DATA		0x14
>  #define I801_I2C_BLOCK_DATA	0x18	/* ICH5 and later */
> -#define I801_LAST_BYTE		0x20
> -#define I801_START		0x40
> -#define I801_PEC_EN		0x80	/* ICH3 and later */
> +
> +/* I801 Host Control register bits */
> +#define SMBHSTCNT_INTREN	0x01
> +#define SMBHSTCNT_KILL		0x02
> +#define SMBHSTCNT_LAST_BYTE	0x20
> +#define SMBHSTCNT_START		0x40
> +#define SMBHSTCNT_PEC_EN	0x80	/* ICH3 and later */
>  
>  /* I801 Hosts Status register bits */
>  #define SMBHSTSTS_BYTE_DONE	0x80
> @@ -289,7 +290,7 @@ static int i801_transaction(struct i801_priv *priv, int xact)
>  
>  	/* the current contents of SMBHSTCNT can be overwritten, since PEC,
>  	 * INTREN, SMBSCMD are passed in xact */
> -	outb_p(xact | I801_START, SMBHSTCNT(priv));
> +	outb_p(xact | SMBHSTCNT_START, SMBHSTCNT(priv));
>  
>  	/* We will always wait for a fraction of a second! */
>  	do {
> @@ -324,7 +325,7 @@ static int i801_block_transaction_by_block(struct i801_priv *priv,
>  	}
>  
>  	status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
> -				  I801_PEC_EN * hwpec);
> +				  SMBHSTCNT_PEC_EN * hwpec);

Would be the right time to change this to a saner construct as your
original patch set was doing.

>  	if (status)
>  		return status;
>  
> @@ -375,11 +376,11 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
>  
>  	for (i = 1; i <= len; i++) {
>  		if (i == len && read_write == I2C_SMBUS_READ)
> -			smbcmd |= I801_LAST_BYTE;
> +			smbcmd |= SMBHSTCNT_LAST_BYTE;
>  		outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
>  
>  		if (i == 1)
> -			outb_p(inb(SMBHSTCNT(priv)) | I801_START,
> +			outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
>  			       SMBHSTCNT(priv));
>  
>  		/* We will always wait for a fraction of a second! */

Other than this, looks good, applied.

-- 
Jean Delvare

  reply	other threads:[~2012-06-27 17:01 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-06-27 13:54 [PATCH 0/8 v3] i2c: i801: enable irq Daniel Kurtz
2012-06-27 13:54 ` [PATCH 1/8 v3] i2c: i801: refactor use of LAST_BYTE i801_block_transaction_byte_by_byte Daniel Kurtz
2012-06-27 14:39   ` Jean Delvare
2012-06-27 13:54 ` [PATCH 2/8 v3] i2c: i801: optimize waiting for HWPEC to finish Daniel Kurtz
2012-06-27 14:58   ` Jean Delvare
2012-06-27 13:54 ` [PATCH 3/8 v3] i2c: i801: check INTR after every transaction Daniel Kurtz
2012-06-27 16:07   ` Jean Delvare
2012-06-28  7:51     ` Daniel Kurtz
2012-06-28 11:36       ` Jean Delvare
2012-07-01 21:20     ` Jean Delvare
2012-07-02  1:19       ` Daniel Kurtz
2012-07-02 10:08         ` Jean Delvare
2012-07-02 15:16           ` Jean Delvare
2012-06-27 13:54 ` [PATCH 4/8 v3] i2c: i801: check and return errors during byte-by-byte transfers Daniel Kurtz
2012-06-27 16:51   ` Jean Delvare
2012-06-28  3:46     ` Daniel Kurtz
2012-06-28  7:08       ` Jean Delvare
2012-06-27 13:54 ` [PATCH 5/8 v3] i2c: i801: rename some SMBHSTCNT bit constants Daniel Kurtz
2012-06-27 17:01   ` Jean Delvare [this message]
2012-06-27 13:54 ` [PATCH 6/8 v3] i2c: i801: drop ENABLE_INT9 Daniel Kurtz
2012-06-28  7:04   ` Jean Delvare
2012-06-27 13:54 ` [PATCH 7/8 v3] i2c: i801: enable irq for i801 smbus transactions Daniel Kurtz
2012-07-04 15:48   ` Jean Delvare
2012-07-04 20:16   ` Jean Delvare
2012-07-05  4:31     ` Daniel Kurtz
2012-07-05  8:10       ` Jean Delvare
2012-07-05 10:29         ` Jean Delvare
2012-07-06 10:28         ` Daniel Kurtz
2012-07-06 11:55           ` Jean Delvare
2012-06-27 13:54 ` [PATCH 8/8 v3] i2c: i801: enable irq for byte_by_byte transactions Daniel Kurtz
2012-07-05 14:46   ` Jean Delvare
2012-07-08 11:53   ` Jean Delvare

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