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From: Fengguang Wu <fengguang.wu@intel.com>
To: Mark Salter <msalter@redhat.com>
Cc: Andrew Morton <akpm@linux-foundation.org>,
	"Eric W. Biederman" <ebiederm@xmission.com>,
	linux-kernel@vger.kernel.org,
	Aurelien Jacquiot <a-jacquiot@ti.com>,
	linux-c6x-dev@linux-c6x.org, Lennox Wu <lennox.wu@gmail.com>,
	Guan Xuetao <gxt@mprc.pku.edu.cn>
Subject: Re: [PATCH] select GENERIC_ATOMIC64 for c6x/score/unicore32 archs
Date: Wed, 15 Aug 2012 10:36:08 +0800	[thread overview]
Message-ID: <20120815023608.GA24697@localhost> (raw)
In-Reply-To: <1344961371.30830.43.camel@deneb.redhat.com>

> -#define L1_CACHE_BYTES        L2_CACHE_BYTES
> +#define L1_CACHE_SHIFT        L2_CACHE_SHIFT
> +#define L1_CACHE_BYTES        (1 << L2_CACHE_SHIFT)

Nitpick: the last line could better be:

+#define L1_CACHE_BYTES        (1 << L1_CACHE_SHIFT)

Reviewed-by: Fengguang Wu <fengguang.wu@intel.com>

Thanks!

  parent reply	other threads:[~2012-08-15  2:36 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-08-14 15:34 Fengguang Wu
2012-08-14 16:22 ` Mark Salter
2012-08-15  2:30   ` Fengguang Wu
2012-08-15  2:36   ` Fengguang Wu [this message]
2012-08-15 13:42     ` Mark Salter
2012-08-15 14:12       ` Fengguang Wu
2012-08-15 14:19         ` Mark Salter
2012-08-15  5:42 ` guanxuetao

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