Re: [PATCH V4 0/6] perf, amd: Enable AMD family 15h northbridge counters

[Jacob Shin <jacob.shin@amd.com>]

On Mon, Dec 10, 2012 at 12:51:00PM -0600, Jacob Shin wrote:
> On Wed, Dec 05, 2012 at 05:04:12PM -0600, Jacob Shin wrote:
> > The following patchset enables 4 additional performance counters in
> > AMD family 15h processors that count northbridge events -- such as
> > number of DRAM accesses.
> > 
> > This patchset is based on previous work done by Robert Richter
> > <rric@kernel.org> :
> > 
> > https://lkml.org/lkml/2012/6/19/324
> > 
> > The main differences are:
> > 
> > * The northbridge counters are indexed contiguously right above the
> >   core performance counters.
> > 
> > * MSR address offset calculations are moved to architecture specific
> >   files.
> > 
> > * Interrups are set up to be delivered only to a single core.
> > 
> > V4:
> > * Moved interrupt core select set up back to event constraints
> >   function, sicne during ->hw_config time we do not yet know on which
> >   CPU the the event will run on.
> > * Tested on and made minor revisions to make sure that the patchset is
> >   compatible with upcoming AMD Family 16h processors, and will support
> >   core and NB counters without any further patches.
> > 
> > V3:
> > Addressed the following feedback/comments from Robert's review
> > * https://lkml.org/lkml/2012/11/16/484
> > * https://lkml.org/lkml/2012/11/26/162
> > 
> > V2:
> > Separate out Robert's patches, and add properly ordered certificate of
> > origins.
> > 
> > Jacob Shin (4):
> >   perf, amd: Use proper naming scheme for AMD bit field definitions
> >   perf, x86: Move MSR address offset calculation to architecture
> >     specific files
> >   perf, x86: Allow for architecture specific RDPMC indexes
> >   perf, amd: Enable northbridge performance counters on AMD family 15h
> > 
> > Robert Richter (2):
> >   perf, amd: Rework northbridge event constraints handler
> >   perf, amd: Generalize northbridge constraints code for family 15h
> > 
> >  arch/x86/include/asm/cpufeature.h    |    2 +
> >  arch/x86/include/asm/msr-index.h     |    2 +
> >  arch/x86/include/asm/perf_event.h    |   13 +-
> >  arch/x86/kernel/cpu/perf_event.c     |    2 +-
> >  arch/x86/kernel/cpu/perf_event.h     |   25 ++-
> >  arch/x86/kernel/cpu/perf_event_amd.c |  318 ++++++++++++++++++++++++++--------
> >  6 files changed, 268 insertions(+), 94 deletions(-)
> > 
> > -- 
> 
> Ping .. ? any comments/feedback ? If things look okay, could you
> please commit to tip perf/core ?

Ping #2 .. ?

Thanks!

-Jacob